Power-supply accuracy is often limited by its transient response, which is characterized by its maximum voltage drop, settling time and voltage error integral (Figure 5).

The response time measures how fast a power device regulates back to the targeted output voltage after an abrupt change in load current or supply voltage. The response time comprises three stages: a delay time to react to the change, a recovery time from a dip or overshoot, and a settling time.

Low-I_Q devices suffer from longer response times because the internal parasitic capacitors need to be charged to new operating points with relatively less current. The worst case is usually a step from no load to the maximum allowed load current. Such cases necessitate reactivating circuits that had been deactivated or reduced in power, causing an additional delay.

More importantly, the settling time itself suffers from reduced bias conditions. For a conventional differential input stage, the gain reduces linearly with the bias current, which causes a reduction in bandwidth and increased settling time.

Calculating figures of merit (FOMs) helps the designer judge the overall performance of a power regulator. Equation 3 calculates a transient response dip FOM, normalizing the I_Q by the maximum output current of the converter, the load current step (∆I_O), the induced voltage drop (∆V_O) and the output capacitor (C_O). Figure 6 shows how FOM changes over time for a 5-V buck-boost converter. The smaller the FOM, the better the regulator’s performance.