SLYY245 March   2025 DRV7308

 

  1.   1
  2.   Overview
  3.   At a glance
  4.   Introduction
  5.   How package variations meet market demands
  6.   Cost efficiency
  7.   Power efficiency
  8.   Enabling miniature products
  9.   Precision solutions
  10.   High voltage
  11.   Isolation
  12.   Multiple chips in one package
  13.   Reliability testing for packaging
  14.   Space-grade packages
  15.   Conclusion
  16.   Additional resources

Power efficiency

Efficiency is the most important metric for designing high-power solutions. While TI offers discrete field-effect transistors (FETs) and regulators, integrating the FET with a controller is important in many power designs. Earlier designs relied on numerous gold wire-bonds (such as those shown in Figure 5) to minimize electrical resistance in FETs, with the cost of the wire sometimes exceeding that of the chip in the package. To reduce costs and improve power and performance, TI developed silicon technologies compatible with copper wire-bonds.

Even though a HTSSOP package may only have a few external pins, dozens of heavy-gauge wire bonds are needed to meet electrical current and resistance requirements for an integrated FET. Figure 5 Even though a HTSSOP package may only have a few external pins, dozens of heavy-gauge wire bonds are needed to meet electrical current and resistance requirements for an integrated FET.

As power densities increase, TI has adopted vertical FET technology and copper clips such as those shown in Figure 6 to maintain low resistance in FETs in high-current packages.

Copper clips are used in high-current packages to reduce resistance compared to multiple wire-bonds as shown in Figure 5. Figure 6 Copper clips are used in high-current packages to reduce resistance compared to multiple wire-bonds as shown in Figure 5.

Innovations in semiconductor manufacturing have integrated CMOS and bipolar transistor technology on the same chip, and led to the development of high-performance FETs with integrated controllers. To meet demands for low electrical resistance and advanced controllers, TI created HotRod™ technology, which uses low-resistance copper bumps to closely connect the power circuitry on the PCB to the chip, as shown in Figure 7.

Copper bumps directly connect the silicon die to the copper in the package, providing a nearly direct path from the FET to the PCB. Figure 7 Copper bumps directly connect the silicon die to the copper in the package, providing a nearly direct path from the FET to the PCB.

For designers requiring industry-standard package footprints, TI’s enhanced HotRod QFN package technology offers the flexibility to route signals throughout the package – as shown in Figure 8 – while maintaining very low-resistance connections to efficiently deliver power to end equipment.

Enhanced HotRod technology connects the silicon to thick copper routing layers. This approach enables very low resistance to the PCB, while allowing flexibility for thermal pads or matching standardized package footprints. Figure 8 Enhanced HotRod technology connects the silicon to thick copper routing layers. This approach enables very low resistance to the PCB, while allowing flexibility for thermal pads or matching standardized package footprints.

There are many applications, such an electronic stylus, that require extreme miniaturization. As shown in Figure 9 and Figure 10, integrating an inductor into the package helps address small-size constraints so that designers can implement a high-efficiency switching regulator where historically it hasn’t fit. In addition to miniaturization, TI’s MicroSiP™ packages (shown in Figure 9 and Figure 10) are designed to transfer all of the module’s heat to the PCB by closely coupling the chip to the thicker copper layers within the PCB.

A cross-section of TI’s TPS82670 step-down converter in the MicroSiP™ package. The embedded silicon circuit is located beneath its inductor Figure 9 A cross-section of TI’s TPS82670 step-down converter in the MicroSiP™ package. The embedded silicon circuit is located beneath its inductor
A top- and bottom-side view of the TPS82670 step-down converter in the MicroSiP package. Figure 10 A top- and bottom-side view of the TPS82670 step-down converter in the MicroSiP package.

Design engineers also need higher-power modules that integrate high-efficiency inductors directly into the package, while increasing the limits of power density. TI's new power modules leverage MagPack™ technology, our new proprietary integrated magnetic packaging, increasing power density and efficiency and reducing temperatures and radiated emissions while minimizing board space and system power losses. Modules with MagPack technology such as the TPSM82866A 6A step-down converter (shown in Figure 11 and Figure 12) have a power density of nearly 1A per 1mm2.

The TPSM82866A 6A step-down converter in the 2.3mm-by-3-mm MagPack package achieves a total solution size of 28mm2. Figure 11 The TPSM82866A 6A step-down converter in the 2.3mm-by-3-mm MagPack package achieves a total solution size of 28mm2.
Power modules with MagPack technology are 20% smaller than competing 3A and 6A modules. Figure 12 Power modules with MagPack technology are 20% smaller than competing 3A and 6A modules.

Gallium nitride (GaN) power stages, with their high power density and ability to operate at higher voltages, are becoming popular in markets such as battery charging and solar energy. As Figure 13 illustrates, TI’s 100V LMG3100 GaN FET with enhanced HotRod package technology enables the placement of thermal vias close to the input voltage, while power pads optimize power dissipation from the package.

The LMG3100 GaN FET power stage in a 15-pin very thin quad flat no-lead (VQFN) package. The GaN device uses large source and drain pads and an exposed chip for improved thermal management. Figure 13 The LMG3100 GaN FET power stage in a 15-pin very thin quad flat no-lead (VQFN) package. The GaN device uses large source and drain pads and an exposed chip for improved thermal management.

Another GaN-based device, TI’s three-phase DRV7308 GaN intelligent power module (IPM), comes in an industry-standard quad flat no-lead (QFN) 12mm-by-12mm package, which is 55% smaller than competing 250W IPMs and reduces PCB size more than 65%, as shown in Figure 14.

The DRV7308 GaN IPM PCB compared to a 250W insulated-gate bipolar transistor solution. Figure 14 The DRV7308 GaN IPM PCB compared to a 250W insulated-gate bipolar transistor solution.