SNAS764 May 2018 LMX2572LP
PRODUCTION DATA.
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | RAMP1_DLY | RAMP1_RST | RAMP0_NEXT | 0 | 0 | RAMP0_NEXT_TRIG | |
R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15 - 7 | R/W | 0h | Program 0h to this field. | |
6 | RAMP1_DLY | R/W | 0h | When enabled, increases RAMP1 length by basing the ramp clock on two phase detector cycles instead of one.
0: Ramp clock = 1 fPD cycle 1: Ramp clock = 2 fPD cycles |
5 | RAMP1_RST | R/W | 0h | Resets RAMP1 at start of ramp to eliminate round-off errors. Applies to automatic ramping mode only.
0: Disabled 1: Reset |
4 | RAMP0_NEXT | R/W | 0h | Defines what ramp comes after RAMP0.
0: RAMP0 1: RAMP1 |
3 - 2 | R/W | 0h | Program 0h to this field. | |
1 - 0 | RAMP0_NEXT_TRIG | R/W | 0h | Defines what triggers the next ramp.
0: RAMP0_LEN timeout counter 1: Trigger A 2: Trigger B 3: Not used |