To update the DDRSS register settings,
the following steps should be followed:
- Navigate to the "u-boot"
worksheet (once all user input worksheets have been completed) and save the DTSI
file by selecting the "Save DTSI" button at the top of the worksheet. When
prompted, save and add the file to the u-boot source code, placing the file
inside the <UBOOT_BASE>/arch/arm/dts/ folder.
- Update the corresponding R5
common processor device tree source file to include the new DDR DTSI file
generated by the Jacinto 7 DDRSS Register Configuration Tool. As an example, the
"k3-j721e-r5-common-proc-board" device tree source file includes the Jacinto 7
DDRSS Register Configuration Tool output DTSI file
("k3-j721e-ddr-evm-lp4-4266.dtsi") when building the R5 boot loader for the
TDA4VM EVM.
Source:
arch/arm/dts/k3-j721e-r5-common-proc-board.dts
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
*/
/dts-v1/;
#include "k3-j721e-som-p0.dtsi"
#include "k3-j721e-ddr-evm-lp4-4266.dtsi"
#include "k3-j721e-ddr.dtsi"
- Rebuild the source code by
following the instructions in the SDK documentation.