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Arm CPU 2 Arm Cortex-A72 Arm MHz (Max.) 2000 Co-processor(s) MCU Island: 1 Dual Arm Cortex-R5, SoC: 2 Dual Arm Cortex-R5 Features MCU Island: ASIL-D, SoC main: ASIL-B, safety island enabled Ethernet MAC 8-port 2.5Gb switch PCIe 4 PCIe Gen3 CAN (#) 16 CSI-2 4L TX, 8L RX Serial I/O CAN-FD, I2C, I3C, UART, USB DRAM LPDDR4-3733 McASP 12 USB 2 USB3.1 Security Debug security, Secure boot & storage & programming, Cryptographic acceleration, Trusted execution environment, Software IP protection, Device identity, Isolation firewalls EMIF 1 32-bit GPIO 226 SPI 1 OSPI/Hypervisor, 1 QSPI, 11 McSPI Storage interface 1 eMMC, 2 SDIO Operating temperature range (C) -40 to 125 Rating Automotive open-in-new Find other DRAx gateway & vehicle compute SoCs

Package | Pins | Size

FCBGA (ALF) 827 open-in-new Find other DRAx gateway & vehicle compute SoCs

Features

  • Processor cores:
  • Dual 64-bit Arm® Cortex®-A72 microprocessor subsystem at up to 2.0 GHz, 24K DMIPS
    • 1MB shared L2 cache per dual-core Arm® Cortex®-A72 cluster
    • 32KB L1 DCache and 48KB L1 ICache per Cortex®-A72 Core
  • Four Arm® Cortex®-R5F MCUs at up to 1.0 GHz, 8K DMIPS
    • 64K L2 RAM per core memory
  • Memory subsystem:
  • 2MB of on-chip L3 RAM with ECC and coherency
    • ECC error protection
    • Shared coherent cache
    • Supports internal DMA engine
  • External Memory Interface (EMIF) module with ECC
    • Supports LPDDR4 memory types
    • Supports speeds up to 3733 MT/s
    • 32-bit data bus with inline ECC up to 14.9GB/s
  • General-Purpose Memory Controller (GPMC)
  • 512KB on-chip SRAM in MAIN domain, protected by ECC
  • Safety: targeted to meet ASIL-C for MCU island and ASIL-B for main processor
  • Integrated MCU island subsystem of Dual Arm® Cortex®-R5F cores with floating point coprocessor and optional lockstep operation, targeted to meet ASIL-C safety requirements/certification
    • 512B Scratchpad RAM memory
    • Up to 1MB on-chip RAM with ECC dedicated for R5F
    • Integrated Arm® Cortex®-R5F MCU island isolated on separate voltage and clock domains
      • Dedicated memory and interfaces capable of being isolated from the larger SoC
  • The DRA829 main processor is targeted to meet ASIL-B safety requirements/certification
    • Widespread ECC protection of on-chip memory and interconnect
    • Built-in self-test (BIST) and fault-injection for CPU and on-chip RAM
    • Error Signaling Module (ESM) with error pin
    • Runtime safety diagnostics, voltage, temperature, and clock monitoring, windowed watchdog timers, CRC engine for memory integrity checks
    • Safety documentation available for applications required to meet ISO 26262 requirements
  • Capture subsystem:
  • Two CSI2.0 4L RX plus one CSI2.0 4L TX
  • Display subsystem:
  • One eDP/DP interface with Multi-Display Support (MST)
    • HDCP1.4/HDCP2.2 high-bandwidth digital content protection
  • One DSI TX (up to 2.5K)
  • Up to two DPI
  • Device security:
  • Secure boot with secure runtime support
  • Customer programmable root key, up to RSA-4K or ECC-512
  • Embedded hardware security module
  • Crypto hardware accelerators – PKA with ECC, AES, SHA, RNG, DES and 3DES
  • High speed serial interfaces:
  • Integrated ethernet switch supporting
    (total of 8 external ports)
    • Up to eight 2.5Gb SGMII
    • Up to eight RMII (10/100) or RGMII (10/100/1000)
    • Up to two QSGMII
  • Up to four PCI-Express® (PCIe) Gen3 controllers
    • Gen1 (2.5GT/s), Gen2 (5.0GT/s), and Gen3 (8.0GT/s) operation with auto-negotiation
    • Up to two lanes per controller
  • Two USB 3.0 dual-role device (DRD) subsystem
    • Two enhanced SuperSpeed Gen1 ports
    • Each port supports Type-C switching
    • Each port independently configurable as USB host, USB peripheral, or USB DRD
  • Automotive interfaces:
  • Sixteen Modular Controller Area Network (MCAN) modules with full CAN-FD support
  • Audio interfaces:
  • Twelve Multichannel Audio Serial Port (MCASP) modules
  • Flash memory interfaces:
  • Embedded MultiMediaCard interface (eMMC™ 5.1)
  • Universal Flash Storage (UFS 2.1) interface with two lanes
  • Two Secure Digital® 3.0/Secure Digital Input Output 3.0 interfaces (SD3.0/SDIO3.0)
  • Two simultaneous flash interfaces configured as
    • One OSPI and one QSPI flash interfaces
    • or HyperBus™ and QSPI flash interface
  • System-on-Chip (SoC) architecture:
  • 16-nm FinFET technology
  • 24 mm × 24 mm, 0.8-mm pitch, 827-pin FCBGA (ALF), enables IPC class 3 PCB routing
  • TPS6594-Q1 Companion Power Management ICs (PMIC):
  • Functional Safety support up to ASIL-D
  • Flexible mapping to support different use cases

All trademarks are the property of their respective owners.

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Description

Jacinto™ 7 DRA829V automotive processors, based on the Arm®v8 64-bit architecture, provide advanced system integration to enable lower system costs of automotive applications such as Gateway, Vehicle Compute, and Body Domain Controller. The integrated diagnostics and functional safety features are targeted to ASIL-B/C certification/requirements. The integrated microcontroller (MCU) island eliminates the need for an external system MCU. The device features a Gigabit Ethernet switch and a PCIe® hub which enables networking use cases that require heavy data bandwidth. Up to four Arm® Cortex®-R5F subsystems manage low level, timing critical processing tasks leaving the Arm® Cortex®-A72’s unencumbered for applications. A dual-core cluster configuration of Arm® Cortex®-A72 facilitates multi-OS applications with minimal need for a software hypervisor.

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Sample availability

ALF package is in preview. Preproduction samples for XDRA829VXXGALF are available (symbolized XJ721EGALF).  Request now

Technical documentation

= Featured
No results found. Please clear your search and try again. View all 16
Type Title Date
* Datasheet DRA829V Jacinto™ Automotive Processors Silicon Revision 1.0 datasheet Dec. 18, 2019
* User guides DRA829/TDA4VM/AM752x Technical Reference Manual (Rev. A) Nov. 14, 2019
Application notes Jacinto 7 LPDDR4 Board Design and Layout Guidelines (Rev. A) Apr. 23, 2020
White papers 運用 Jacinto™ 7 處理器的汽車設計功能安全特性 Mar. 01, 2020
White papers 오토모티브 설계 시 Jacinto™ 7 프로세서의 기능적 안전성 활용하기 Mar. 01, 2020
White papers 차세대 자동차를 위한 진화하는 차량용 게이트웨이 (Rev. A) Mar. 01, 2020
White papers 為下一代車輛開發的汽車閘道 (Rev. A) Feb. 26, 2020
Technical articles Enabling the software-defined car with a vehicle compute gateway platform Jan. 07, 2020
Technical articles Making ADAS technology more accessible in vehicles Jan. 07, 2020
White papers Leverage Jacinto 7 Processors Functional Safety Features for Automotive Designs Dec. 12, 2019
White papers Evolving automotive gateways for next-generation vehicles (Rev. A) Dec. 07, 2019
More literature Jacinto 7 EVM Quick Start Guide for TDA4VM and DRA829V Processors Oct. 10, 2019
Application notes Jacinto 7 High-Speed Interface Layout Guidelines Oct. 04, 2019
User guides User's Guide for Powering DRA829V and TDA4VM with the TPS6594-Q1 PMICs Jul. 09, 2019
Technical articles Smart sensors are going to change how you drive (because eventually, you won’t) Apr. 25, 2018
Technical articles AI in Automotive: Practical deep learning Feb. 08, 2018

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
Description

The DRA829VXEVM evaluation module (EVM) platform is based on the Jacinto™ DRA829V and is designed to speed up development efforts and reduce time to market for automotive gateway and vehicle compute systems. The integrated diagnostics and functional safety features are targeted to ASIL-D (...)

Features
  • SOM
    • J721E Processor
    • Mates with the Common Processor board (SOM and CP are needed for base EVM functionality)
    • Optimized power solution (PMIC)
    • DRAM, LPDDR4‐3733, 4GByte total memory, support inline ECC
    • Octal‐SPI NOR flash, 512Mb memory (8bit)
    • HyperFlash + HyerRAM, 512Mb flash memory + 256Mb RAM
  • Common (...)

Software development

SOFTWARE DEVELOPMENT KITS (SDK) Download
Software Development Kit for DRA8x & TDA4x Jacinto™ Automotive Processors
PROCESSOR-SDK-DRA8X-TDA4X — Processor SDK RTOS Automotive (PSDKRA) can be used together with either  Processor SDK Linux Automotive (PSDKLA) or Processor SDK QNX Automotive (PSDKQA) to form a multi-processor software development platform for TDA4x and DRA8x SoCs within the TI’s Jacinto™ automotive (...)
Features

PSDKLA:

  • R5F SPL: eMMC boot, HS200 mode support
  • A72 U-boot: USB Mass Storage Class, Device Firmware Upgrade (DFU) , Universal Flash Storage (UFS), eMMC boot
  • Kernel Connectivity drivers: CPSW9G Ethernet Virtual driver, USB gadget, dual role support, SD card Ultra-High Speed (UHS) mode, PCIe backplane (...)
APPLICATION SOFTWARE & FRAMEWORKS Download
Hella Aglaia TDAx-based ADAS algorithms for front camera
Provided by Hella Aglaia HELLA Aglaia develops embedded software solutions for advanced driver assistance systems – compliant with certified industry standards and ready for hardware integration.

Leveraging the powerful deep learning capabilities of the TDA4x processor family, HELLA Aglaia’s robust image processing (...)

DEBUG PROBES Download
XDS560v2 System Trace USB Debug Probe
TMDSEMU560V2STM-U The XDS560v2 System Trace is the first model of the XDS560v2 family of high-performance debug probes (emulators) for TI processors. The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).

The (...)

$995.00
Features

XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)

IDES, CONFIGURATION, COMPILERS & DEBUGGERS Download
Code Composer Studio (CCS) Integrated Development Environment (IDE)
CCSTUDIO

Code Composer Studio is an integrated development environment (IDE) that supports TI's Microcontroller and Embedded Processors portfolio. Code Composer Studio comprises a suite of tools used to develop and debug embedded applications. It includes an optimizing C/C++ compiler, source code editor (...)

OPERATING SYSTEMS (OS) Download
QNX Neutrino RTOS
Provided by QNX Software Systems — The QNX Neutrino® Realtime Operating System (RTOS) is a full-featured and robust RTOS designed to enable the next-generation of products for automotive, medical, transportation, military and industrial embedded systems. Microkernel design and modular architecture enable customers to create (...)

Design tools & simulation

SIMULATION MODELS Download
SPRM751.ZIP (13 KB) - BSDL Model
SIMULATION MODELS Download
SPRM752.ZIP (1983 KB) - IBIS Model
SIMULATION MODELS Download
SPRM753.ZIP (1 KB) - Thermal Model
CALCULATION TOOLS Download
Clock Tree Tool for Sitara, Automotive, Vision Analytics, & Digital Signal Processors
CLOCKTREETOOL The Clock Tree Tool (CTT) for Sitara™ ARM®, Automotive, and Digital Signal Processors is an interactive clock tree configuration software that provides information about the clocks and modules in these TI devices. It allows the user to:
  • Visualize the device clock tree
  • Interact with clock tree elements (...)
document-generic User guide
CALCULATION TOOLS Download
Pin mux tool
PINMUXTOOL The PinMux Utility is a software tool which provides a Graphical User Interface for configuring pin multiplexing settings, resolving conflicts and specifying I/O cell characteristics for TI MPUs. Results are output as C header/code files that can be imported into software development kits (SDKs) or (...)

CAD/CAE symbols

Package Pins Download
FCBGA (ALF) 827 View options

Ordering & quality

Support & training

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