SPRACZ7 January   2022 TMS320F28075 , TMS320F28075-Q1 , TMS320F28076 , TMS320F28232 , TMS320F28232-Q1 , TMS320F28234 , TMS320F28234-Q1 , TMS320F28235 , TMS320F28235-Q1 , TMS320F28332 , TMS320F28333 , TMS320F28334 , TMS320F28335 , TMS320F28335-Q1 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379D-Q1 , TMS320F28379S

 

  1.   Trademarks
  2. 1 Introduction
    1. 1.1 Abbreviations
  3. 2 Central Processing Unit (CPU)
  4. 3 Development Tools
    1. 3.1 Driver Library (Driverlib)
    2. 3.2 Embedded Application Binary Interface (EABI) Support
  5. 4 Package and Pinout
  6. 5 Operating Frequency and Power Management
  7. 6 Power Sequencing
  8. 7 Input Clock Options
  9. 8 Memory Map
  10. 9 Flash and OTP
    1. 9.1 Size and Number of Sectors
    2. 9.2 Flash Parameters
    3. 9.3 Flash Programming
    4. 9.4 Entry Point into Flash
    5. 9.5 Dual Code Security Module (DCSM) and Password Locations
    6. 9.6 OTP
  11. 10Boot ROM
    1. 10.1 Boot ROM Reserved RAM
    2. 10.2 Boot Mode Selection
    3. 10.3 Bootloaders
  12. 11Architectural Enhancements
    1. 11.1 Clock Sources and Domains
    2. 11.2 Watchdog Timer
    3. 11.3 Peripheral Interrupt Expansion (PIE)
    4. 11.4 Lock Protection Registers
    5. 11.5 General-Purpose Input/Output (GPIO)
    6. 11.6 External Interrupts
    7. 11.7 Crossbar (X-BAR)
  13. 12Peripherals
    1. 12.1 New Peripherals
      1. 12.1.1 Analog Subsystem Interconnect
      2. 12.1.2 Comparator Subsystem (CMPSS)
      3. 12.1.3 Control Law Accelerator (CLA)
    2. 12.2 Control Peripherals
      1. 12.2.1 Enhanced Pulse Width Modulator (ePWM)
      2. 12.2.2 Enhanced Capture Module (eCAP)
      3. 12.2.3 Enhanced Quadrature Encode Pulse Module (eQEP)
      4. 12.2.4 Sigma-Delta Filter Module (SDFM)
    3. 12.3 Analog Peripherals
      1. 12.3.1 Analog-to-Digital Converter (ADC)
    4. 12.4 Communication Peripherals
      1. 12.4.1 SPI
      2. 12.4.2 SCI
      3. 12.4.3 USB
      4. 12.4.4 I2C
      5. 12.4.5 CAN
  14. 13Configurable Logic Block (CLB)
  15. 14Device Comparison Summary
  16. 15References

14 Device Comparison Summary

In this section, Table 14-1 provides a general feature comparison between the F2837xD/S/07x and the F2833x/23x device families. For specific details about device features, maximum clock frequency, memory sizes, and peripheral availability and quantity, see the device-specific data sheet. Only the super-set part number is shown for a device family.

Table 14-1 Device Comparison Matrix
F28379DF28075F28335
Clock200 MHz

120 MHz

150 MHz

VCU-II

√ (1)--
TMU√√-
CLA√ (Type 1)√ (Type 1)-
Flash / RAM512K x 16 / 102K x 16256K x 16 / 50K x 16256K x 16 / 34K x 16

EMIF

√√

-

XINTF

--√
32-bit CPU Timers√√√
Watchdog Timer√√√

NMI WD Timer

√√

-

0-pin internal Oscillators√√

-

ADC

16-bit mode and 12-bit mode

3.5 MSPS x 4 /1.1 MSPS x 4

12-bit

mode

3.1MSPS x 3

12-bit

mode

12.5 MSPS x 1

CMPSS w/ 2 DACs√√-
Buffered DAC√√

-

ePWM / HRPWM√ / √ (Type 4)√ / √ (Type 4)√ / √ (Type 0)
eCAP / HRCAP√ / √ (Type 0)√ / √ (Type 0)√ / - (Type 0)
eQEP√ (Type 0)√ (Type 0)√ (Type 0)

SDFM

√√-
CAN (2)√ (DCAN)√ (eCAN)√ (eCAN)
I2C√ (Type 1)√ (Type 0)√ (Type 0)
SCI√√√
SPI√ (Type 2)√ (Type 2)√ (Type 0)

McBSP

√√√

USB

√√

-

uPP

√

-

-

X-BARs√√-
CLB√√-
(1) √ indicates available. For details, check the specific device.
(2) DCAN and eCAN are not software compatible.
(2)

F2837xD devices are dual-cire devices.

For more detailed device information, see the following data sheets: