SPRADP5 January   2026 AM62P , AM62P , AM62P-Q1 , AM62P-Q1

 

  1.   1
  2.    AM62Px eMMC HS400 IBIS Model Simulation Methodology
  3.   Trademarks
  4. 1Overview
    1. 1.1 Board Designs Supported
    2. 1.2 General Board Layout Guidelines
    3. 1.3 PCB Stack-Up
    4. 1.4 Bypass Capacitors
      1. 1.4.1 Bulk Bypass Capacitors
      2. 1.4.2 High-Speed Bypass Capacitors
    5. 1.5 Velocity Compensation
  5. 2eMMC Board Design and Layout Guidance
    1. 2.1 eMMC Introduction
    2. 2.2 eMMC Signal Termination
    3. 2.3 Signal Routing Specification
    4. 2.4 Power Supply Design
  6. 3eMMC Board Design Simulations
    1. 3.1 Board Model Extraction
    2. 3.2 Board-Model Validation
    3. 3.3 Capacitor Loop Inductance
    4. 3.4 AC Impedance
    5. 3.5 IBIS Model Simulations
      1. 3.5.1 Simulation Setup
      2. 3.5.2 Simulation Bit Patterns
      3. 3.5.3 Simulation Best Practices
      4. 3.5.4 Simulation Strategy and Examples
      5. 3.5.5 Pass/Fail Checks
  7. 4Design Example
    1. 4.1 Stack-Up
    2. 4.2 Power Routing
    3. 4.3 Signal Routing
  8. 5Summary
  9. 6References

4.1 Stack-Up

These guidelines recommend a 10- or 12-layer PCB stack-up for full device entitlement. Below is a 12-layer example stack-up used by SK-AM62P-LP (PROC164E2):

Table 4-1 Example 12-layer PCB Stack-up
Layer NoStack-upRouting Plan Highest Priorities and Layer
Solder mask
1TOP - PWR/SIGPMIC, SoC, and eMMC devices and BGA breakouts, GND
2GNDREF
3PWR/SIGeMMC signals, LPDDR4 data signals, VDDA_1V8, GND, LVCMOS escape
4GNDREF
5SIG/GNDGND, LPDDR data signals, LVCMOS escape
6GNDREF
7PWRVCC1V8_SYS (eMMC supply from PMIC L4 inductor to vias beneath eMMC device), VDD_CORE, VDD_LPDDR4, DVDD_3V3
8PWR/GNDDVDD_1V8 (VDDS_MMC0 supply from SoC region to vias beneath VDDS_MMC0 pin), VDD1_LPDDR4_1V8, GND, VDDA_x
9PWR/GNDDVDD_1V8 (VDDS_MMC0 supply from PMIC L4 inductor to SoC region), GND, VDDR_CORE, VDDA_1V8, DVDD_3V3,
10SIG/GNDGND, LPDDR CA signals, LVCMOS escape
11GNDREF
12BOTTOM - SIG/PWReMMC CLK series termination resistor (close to SoC), eMMC DS series termination (close to eMMC), decoupling capacitors, LVCMOS escape, GND
Solder mask