SPRADT6 July 2026 AWR2944 , AWR2944P
The STC (Self-Test Controller) performs Logic Built-In Self-Test (LBIST) on the CPU core logic gate circuits based on OPMISR (On-Product Multiple Input Signature Register). The STC mainly consists of a ROM interface, an FSM sequence controller, register files, a Bypass/ATE interface, and a VBUSP interface.
The STC reads test vectors (including Segment ID, Pattern Count, and Golden MISR values) from the on-chip ROM, shifts the scan data into the logic under test, and finally compares the 896-bit MISR value generated by the OPMISR controller with the Golden MISR value in the ROM, writing the result into the status register. It supports the Stuck-at fault model and the Launch-on-System-Clock transition delay method.
In the AWR2944, the STC instances for MSS and DSS run independently and can be triggered separately.
STC Module Test Workflow:
| Step | Action | Description |
|---|---|---|
| 1 | SDL_TEST_dplInit | Initializes the DPL |
| 2 | SDL_ESM_init | Registers STC events |
| 3 | SDL_STC_config | Configures STC parameters (test duration/interval/algorithm) |
| 4 | SDL_STC_selfTest | Executes STC self-test |
| 5 | Waiting for completion/timeout | Waits for test completion or timeout |
| 6 | SDL_STC_getResult | Reads test results |
| 7 | Clear interrupt | Clears STC interrupt flags |
| Key Function | Functions |
|---|---|
| SDL_STC_selfTest | Executes STC LBIST self-test |
| SDL_STC_config | Configures STC parameters |
| SDL_STC_getResult | Gets STC test results |