SPRADT6 July 2026 AWR2944 , AWR2944P
The DPL (Data Porting Layer) is the low-level abstraction layer of the SDL, shielding differences in interrupt management, delay control, and address mapping across different chip platforms and processor cores. All upper-layer SDL modules access low-level hardware resources through DPL interfaces.
The design goal is to decouple SDL modules from specific hardware implementations, enabling the same set of SDL code to be ported to different chips such as AM263x, AM273x, and AWR2944. The DPL provides two main sets of capabilities: interrupt management (registration/unregistration/enabling/disabling) and basic utilities (delay/address translation). On the AWR2944, it simultaneously supports interrupt management for both R5F and C66x DSP cores.
The DPL interface is registered to the SDL library in the form of a function pointer structure SDL_DPL_Interface, containing the following interfaces:
| Interface | Corresponding Function | Description |
|---|---|---|
| enableInterrupt | SDL_TEST_enableInterrupt | Enables the specified interrupt number |
| disableInterrupt | SDL_TEST_disableInterrupt | Disables the specified interrupt number |
| registerInterrupt | SDL_TEST_registerInterrupt | Registers an interrupt callback |
| deregisterInterrupt | SDL_TEST_deregisterInterrupt | Unregisters an interrupt callback |
| delay | ClockP_sleep | Delay (μs level) |
| addrTranslate | SDL_TEST_addrTranslate | Translates physical address to local address |
The DPL itself does not provide independent tests; it acts as a prerequisite for all SDL modules. The usage method is to call SDL_TEST_dplInit() at the application entry to initialize the DPL before initializing specific SDL modules. Note that the DPL must be initialized before all other SDL modules.