TIDUDI9A January   2018  – May 2025 ISOM8610

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1 ISO121x
      2. 2.2.2 SN74LV165A
      3. 2.2.3 SN74LVC1GU04
      4. 2.2.4 TVS3300
      5. 2.2.5 ISOM8600
    3. 2.3 System Design Theory
      1. 2.3.1 Digital Input Stage
      2. 2.3.2 Broken Wire Detection
        1. 2.3.2.1 Case 1: Wire Intact and Input State '1'
        2. 2.3.2.2 Case 2: Wire Intact and Input State '0'
        3. 2.3.2.3 Case 3: Broken Wire
      3. 2.3.3 Readout of Digital Outputs
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Required Hardware and Software
      1. 3.1.1 Hardware
      2. 3.1.2 Software
    2. 3.2 Testing and Results
      1. 3.2.1 Test Setup
      2. 3.2.2 Test Results
        1. 3.2.2.1 Group-Channel Configuration
        2. 3.2.2.2 Single-Channel Configuration
      3. 3.2.3 Conclusion
  10. 4Design Files
    1. 4.1 Schematics
    2. 4.2 Bill of Materials
    3. 4.3 PCB Layout Recommendations
      1. 4.3.1 Layout Prints
    4. 4.4 Altium Project
    5. 4.5 Gerber Files
    6. 4.6 Assembly Drawings
  11. 5Software Files
  12. 6Related Documentation
    1. 6.1 Trademarks
  13. 7About the Author
    1. 7.1 Acknowledgments
  14. 8Revision History

2.3.1 Digital Input Stage

The 16 inputs of this reference design are built up in two groups of eight channels. Three dual-channel ISO1212 and two single-channel ISO1211 are used per group so that maximum flexibility is provided to the user. Figure 2-4 and Figure 2-5 show the input stages of one ISO1212 and one ISO1211, respectively.

TIDA-01509 Schematic of Input Stage ISO1211Figure 2-4 Schematic of Input Stage ISO1211
TIDA-01509 Schematic of Input Stage ISO1212Figure 2-5 Schematic of Input Stage ISO1212

Pin FGND of the two ISO1211 as well as pins FGND1 and FGND2 of the three ISO1212 are connected to the field ground FGND through an opto-emulator switch ISOM8600 with default state normally on. The opto-emulator switch can disconnect the two grounds by switching the control line high. In this reference design, the microcontroller on the LaunchPad is used to control the optical switch. Figure 2-6 shows the connection of the FGND pins of the ISO121x devices to the field ground.

If the broken wire feature is not needed and the design is only used as a standard digital input, the optical switch can be short-circuited with a jumper. For this use case, see the Sub 1-W, 16-Channel, Isolated Digital Input Module Reference Design.

TIDA-01509 Schematic of Floating Ground to Field Ground (FGND) Connection With Optical SwitchFigure 2-6 Schematic of Floating Ground to Field Ground (FGND) Connection With Optical Switch

Every input of the ISO1211 can be configured for Type 1, 2, 3 characteristics according to IEC 61131-2 with resistors RTHR and RSENSE. In addition, an input capacitor CIN is connected after RTHR to GND creating an RC filter with RTHR for further protection against ESD, EFT, and surge events. To withstand high pulse voltages, RTHR is selected as a pulse proof resistor. Table 2-1 shows the configuration for Type 1 and 3 digital inputs as well as the resulting voltage ratings according to IEC 61002-4-2, IEC 61002-4-4, and IEC 61002-4-5 for specific values of RTHR, RSENSE, and CIN, respectively.

Table 2-1 Surge, ESD, and EFT
IEC 61131-2
TYPE		RSENSERTHRCINSURGEIEC ESDIEC EFT
LINE-TO-PELINE-TO-LINELINE-TO-FGND
Type 15623 kΩ10 nF±1 kV±1 kV±1 kV±6 kV±4 kV
Type 35621 kΩ10 nF±1 kV±1 kV±500 kV±6 kV±4 kV
330 nF±1 kV±1 kV±1 kV±6 kV±4 kV

To protect the inputs against surge events with even higher ratings, all inputs are as well protected with either a varistor or two TVS3300 TVS diodes. Those devices are placed in parallel to CIN.

In this reference design, all channels as configured for Type 1 inputs with RTHR = 2.4 kΩ and RSENSE = 562 Ω. The typical high-level threshold VIH and minimum low-level threshold VIL at the ISO121x input (include RTHR) for output high and low are given by Equation 1 and Equation 2.

Equation 1. TIDA-01509
Equation 2. TIDA-01509