This design leverages the AM2612 ZNC (10mm × 10mm) package as the motor control and communication controller. The motor control interface includes:

• Enhanced Pulse Width Modulator (ePWM) – The PWM peripheral is built up from smaller single-channel submodules with separate resources that can operate together as required to form a system. This design employs ePWM0, ePWM1, and ePWM2 for the three-phase GaN driver. Each ePWM submodule has two channels A and B to generate two complementary PWM signals with configurable dead-band. All these three PWM submodules share the same time base clock of 250MHz and synchronized with each other. Each ePWM module has a synchronization input and an output which can be configured to link to several sources and events such as EtherCAT sync0 pulse and FSI RXTRIG to close the loop between communication and PWM.
• Sigma-delta filter module (SDFM) – The SDFM is a four-channel digital filter designed specifically for current measurement. Each input channel can receive an independent delta-sigma modulator bit stream. The bit streams are processed by four individually programmable digital decimation filters. In this design, Sinc3 filter type and oversampling rate (OSR) 32 are selected for the filter. With 20MHz clock (data rate of Sinc filter), the latency equals 4.8μs. The SDFM clock and SDM clock are generated by ePWM8A and ePWM8B respectively. The benefit of using the ePWM module is the clock phase and frequency can be adjusted and configured according to the real application. The filter triggered by the ePWM0 SOCA event at the center of each PWM period to output the average value of current during the cycle. In addition, the filter set also includes a fast comparator (secondary filter) for immediate digital threshold comparisons for overcurrent and undercurrent monitoring, and zero crossing detection.
• PRU-ICSS GPIO module three channel peripheral interface – This interface supports functionality for operations utilizing the HDSL, Tamagawa, EnDat 2.2 and BiSS protocols. The interface supports both 2-wire and 4-wire serial RS-485 communication. Each channel ranges from 100kHz to 16MHz. The data FIFO size is 32 bits for transmitting and 4 bits for receiving. The shift size and oversampling on receiving input can be configured. In this design, two BiSS encoders are implemented for the motor rotator angle and absolute position feedback after the reducer gearbox. And two PRU-ICSS instances are used for the data decoding of these two encoders. The position feedback is triggered by ePWM3 compare event C which matches ePWM0 SOCA timing.
• PRU-ICSS real-time Media Independent Interface (MII_RT) module – This module provides a programmable I/O interface for the PRUs to access and control up to two MII ports. Each port has 2 level FIFO up to 64-bytes to support different use cases such as auto-forward, on-the-fly and ping-pong processing. Also, this module has the link detection feature and cyclic redundancy check (CRC) on both the TX and RX path. With the deterministic instruction set, the minimum latency is only 3ns under the 100Mbps link.

Figure 3-1 shows the motor control and communication interface of TIDA-010979 and Figure 3-2 shows the motor control configuration.

Figure 3-1 TIDA-010979 – AM2612 Motor Control and Communication Interface

Figure 3-2 TIDA-010979 Motor Control Configuration