ADC12D1620QML-SP

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Product details

Sample rate (Max) (MSPS) 1600, 3200 Resolution (Bits) 12 Number of input channels 2, 1 Interface type Parallel LVDS Analog input BW (MHz) 2400 Features Ultra High Speed Rating Space Input range (Vp-p) 0.8 Power consumption (Typ) (mW) 3880 Architecture Folding Interpolating SNR (dB) 59.8 ENOB (Bits) 9.5 SFDR (dB) 67.4 Operating temperature range (C) -55 to 125, 25 to 25 Input buffer Yes
Sample rate (Max) (MSPS) 1600, 3200 Resolution (Bits) 12 Number of input channels 2, 1 Interface type Parallel LVDS Analog input BW (MHz) 2400 Features Ultra High Speed Rating Space Input range (Vp-p) 0.8 Power consumption (Typ) (mW) 3880 Architecture Folding Interpolating SNR (dB) 59.8 ENOB (Bits) 9.5 SFDR (dB) 67.4 Operating temperature range (C) -55 to 125, 25 to 25 Input buffer Yes
CCGA (NAA) 376 781 mm² 27.94 x 27.94 CCGA (NAA) 376
  • Total ionizing dose (TID) to 300 krad(Si)
  • Single event functional interrupt (SEFI) tested
  • Single event latch-up (SEL) > 120 MeV-cm2/mg
  • Cold sparing capable
  • Wide temperature range –55°C to +125°C
  • Power consumption = 3.8 W or 2.7 W (1600- or 800-MHz clock)
  • 3-dB Input bandwidth = 3 GHz
  • Low-sampling power-saving mode (LSPSM) reduces power consumption and improves performance for fCLK ≤ 800 MHz
  • Auto-sync function for multi-chip systems
  • Time stamp feature to capture external trigger
  • Test patterns at output for system debug
  • 1:1 Non-demuxed or 1:2 or 1:4 parallel demuxed LVDS outputs
  • Single 1.9-V power supply
  • Total ionizing dose (TID) to 300 krad(Si)
  • Single event functional interrupt (SEFI) tested
  • Single event latch-up (SEL) > 120 MeV-cm2/mg
  • Cold sparing capable
  • Wide temperature range –55°C to +125°C
  • Power consumption = 3.8 W or 2.7 W (1600- or 800-MHz clock)
  • 3-dB Input bandwidth = 3 GHz
  • Low-sampling power-saving mode (LSPSM) reduces power consumption and improves performance for fCLK ≤ 800 MHz
  • Auto-sync function for multi-chip systems
  • Time stamp feature to capture external trigger
  • Test patterns at output for system debug
  • 1:1 Non-demuxed or 1:2 or 1:4 parallel demuxed LVDS outputs
  • Single 1.9-V power supply

The ADC12D1620QML uses a package redesign to achieve better ENOB, SNR, and X-talk compared to the ADC12D1600QML. As is its predecessor, the ADC12D1620QML is a low-power, high-performance CMOS analog-to-digital converter (ADC) that digitizes signals at a 12-bit resolution at sampling rates up to 3.2 GSPS in an interleaved mode. It can also be used as a dual-channel ADC for sampling rates up to 1.6 GSPS. For sampling rates below 800 MHz, there is a low-sampling power-saving mode (LSPSM) that reduces power consumption to less than 1.4 W per channel (typical). The ADC can support conversion rates as low as 200 MSPS.

The ADC12D1620QML uses a package redesign to achieve better ENOB, SNR, and X-talk compared to the ADC12D1600QML. As is its predecessor, the ADC12D1620QML is a low-power, high-performance CMOS analog-to-digital converter (ADC) that digitizes signals at a 12-bit resolution at sampling rates up to 3.2 GSPS in an interleaved mode. It can also be used as a dual-channel ADC for sampling rates up to 1.6 GSPS. For sampling rates below 800 MHz, there is a low-sampling power-saving mode (LSPSM) that reduces power consumption to less than 1.4 W per channel (typical). The ADC can support conversion rates as low as 200 MSPS.

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Technical documentation

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Type Title Date
* Data sheet ADC12D1620QML-SP 12-Bit, Single Or Dual, 3200- or 1600-MSPS RF Sampling Analog-to-Digital Converter (ADC) datasheet (Rev. A) PDF | HTML 12 Oct 2021
* SMD ADC12D1620QML-SP SMD ADC12D1620QML-SP SMD 5962-12205 22 Oct 2020
* Radiation & reliability report ADC12D1600QML-SP/ADC12D1620QML-SP Single-Event Effects (SEE) Radiation Report 27 Jul 2020
* Radiation & reliability report ADC12D1600CCMLS TID Report 17 Jan 2013
* Radiation & reliability report Analysis of Low Dose Rate Effects on Parasitic Bipolar Structures in CMOS Proces 04 May 2012
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. A) PDF | HTML 17 Nov 2022
Application note Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 19 Oct 2022
Selection guide TI Space Products (Rev. I) 03 Mar 2022
Application note Understanding Op Amp Noise in Audio Circuits PDF | HTML 14 Jun 2021
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing 17 Jun 2019
User guide TSW12D1620EVM-CVAL User's Guide (Rev. A) 29 Jan 2019
User guide ADC1xD1x00CVAL Board User’s Guide 09 Jun 2017

Design & development

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Evaluation board

TSW12D1620EVM-CVAL — ADC12D1620QML-SP space-grade wideband receiver evaluation module

The TSW12D1620EVM-CVAL is a 1.5-GHz wideband receiver evaluation module (EVM) that includes ceramic engineering models of the amplifier, analog-to-digital converter (ADC), clocking, temperature sensor, microcontroller, and power solution. The board is best suited for (...)

User guide: PDF
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Support software

MSP430FR5969 Firmware

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Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Reference designs

TIDA-070004 — Space-grade reference design using integrated digital-output temperature sensor

This reference design illustrates the fact that several spacecraft projects provide a system health status telemetry that ground personnel monitor in real time. This reference design shows an example using a digital output temperature sensor to acquire temperature data on a sub-system using a (...)
Design guide: PDF
Schematic: PDF
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