CD74ACT175 Quad D-Type Flip-Flops with Reset | TI.com

CD74ACT175 (ACTIVE) Quad D-Type Flip-Flops with Reset

Quad D-Type Flip-Flops with Reset - CD74ACT175
Datasheet
 

Description

This positive-edge-triggered D-type flip-flop has a direct clear (CLR)\ input. The CD74ACT175 features complementary outputs from each flip-flop.

Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going edge of CLK. When CLK is at either the high or low level, the D input has no effect at the output.

Features

  • Inputs Are TTL-Voltage Compatible
  • Contains Four Flip-Flops With Double-Rail Outputs
  • Buffered Inputs
  • Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption
  • Balanced Propagation Delays
  • ±24-mA Output Drive Current
    • Fanout to 15 F Devices
  • SCR-Latchup-Resistant CMOS Process and Circuit Design
  • Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015
  • Applications Include:
    • Buffer/Storage Registers
    • Shift Registers
    • Pattern Generators

Parametrics

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Part number Order Technology Family VCC (Min) (V) VCC (Max) (V) Bits (#) Voltage (Nom) (V) F @ nom voltage (Max) (MHz) ICC @ nom voltage (Max) (mA) tpd @ nom Voltage (Max) (ns) IOL (Max) (mA) IOH (Max) (mA) 3-state output Operating temperature range (C)
CD74ACT175 Order now ACT     1.5     5.5     4     5     90     0.08     10.5     24     -24     No     -55 to 125