The CDCE937 and CDCEL937 devices are modular PLL-based low cost, high-performance, programmable clock synthesizers, multipliers and dividers. The devices generate up to 7 output clocks from a single input frequency. Each output can be programmed in-system for any clock frequency up to 230MHz, using up to three independent configurable PLLs.
The CDCEx937 has separate output supply pins, VDDOUT, which is 1.8V for CDCEL937 and to 2.5V to 3.3V for CDCE937.
The input accepts an external crystal or LVCMOS clock signal. If an external crystal is used, an on-chip load capacitor is adequate for most applications. The value of the load capacitor is programmable from 0 to 20pF. Additionally, an on-chip VCXO is selectable which allows synchronization of the output frequency to an external control signal, that is, PWM signal.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | CDCEx937 Flexible Low Power LVCMOS Clock Generator With SSC Support For EMI Reduction datasheet (Rev. I) | PDF | HTML | Dec 11, 2024 |
| User guide | CDCE(L)9XX & CDCEx06 Programming Evaluation Module Manual (Rev. A) | Nov 22, 2010 | ||
| Application note | Troubleshooting I2C Bus Protocol | Oct 19, 2009 | ||
| Application note | Usage of I2C for CDCE(L)949, CDCE(L)937, CDCE(L)925, CDCE(L)913 | Sep 23, 2009 | ||
| Application note | Generating Low Phase-Noise Clocks for Audio Data Converters from Low Frequency | Mar 31, 2008 | ||
| Application note | Practical consideration on choosing a crystal for CDCE(L)9xx family | Mar 24, 2008 |
For additional terms or required resources, click any title below to view the detail page where available.
The clock generator CDCE(L)949 family has integrated EEPROM that allows the default frequency settings to be saved upon start up. CDCEL9XXPROGEVM is a programming board that allows a fast programming of prototyping samples or small production quantities. It applies to all 8 devices in the family: (...)
TI's ClockPro software allows users to program/configure the following devices in a friendly GUI interface:
It is intended to be used with the evaluation modules of the above devices.
Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| TSSOP (PW) | 20 | Ultra Librarian |
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