Programmable 4-PLL VCXO clock synthesizer with 2.5-V or 3.3-V LVCMOS outputs
Product details
Parameters
Package | Pins | Size
Features
- Member of Programmable Clock Generator Family
- CDCEx913: 1 PLLs, 3 Outputs
- CDCEx925: 2 PLLs, 5 Outputs
- CDCEx937: 3 PLLs, 7 Outputs
- CDCEx949: 4 PLLs, 9 Outputs
- In-System Programmability and EEPROM
- Serial Programmable Volatile Register
- Nonvolatile EEPROM to Store Customer Settings
- Flexible Input Clocking Concept
- External Crystal: 8 to 32 MHz
- On-Chip VCXO: Pull-Range ±150 ppm
- Single-Ended LVCMOS Up to 160 MHz
- Free Selectable Output Frequency Up to 230 MHz
- Low-Noise PLL Core
- PLL Loop Filter Components Integrated
- Low Period Jitter (Typical 60 ps)
- Separate Output Supply Pins
- CDCE949: 3.3 V and 2.5 V
- CDCEL949: 1.8 V
- Flexible Clock Driver
- Three User-Definable Control Inputs [S0/S1/S2], for Example, SSC Selection, Frequency Switching, Output Enable or Power Down
- Generates Highly Accurate Clocks for Video, Audio, USB, IEEE1394, RFID, Bluetooth®, WLAN, Ethernet™, and GPS
- Generates Common Clock Frequencies Used With TI-DaVinci™, OMAP™, DSPs
- Programmable SSC Modulation
- Enables 0-PPM Clock Generation
- 1.8-V Device Core Supply
- Wide Temperature Range: –40°C to 85°C
- Packaged in TSSOP
- Development and Programming Kit for Easy PLL Design and Programming (TI Pro-Clock™)
Description
The CDCE949 and CDCEL949 are modular PLL-based low cost, high-performance, programmable clock synthesizers, multipliers and dividers. They generate up to 9 output clocks from a single input frequency. Each output can be programmed in-system for any clock frequency up to 230 MHz, using up to four independent configurable PLLs.
The CDCEx949 has separate output supply pins, VDDOUT, 1.8 V for the CDCEL949, and 2.5 V to 3.3 V for CDCE949.
The input accepts an external crystal or LVCMOS clock signal. If an external crystal is used, an on-chip load capacitor is adequate for most applications. The value of the load capacitor is programmable from 0 to 20 pF. Additionally, an on-chip VCXO is selectable, allowing synchronization of the output frequency to an external control signal, that is, a PWM signal.
The deep M/N divider ratio allows the generation of zero-ppm audio or video, networking (WLAN, BlueTooth™, Ethernet, GPS) or Interface (USB, IEEE1394, Memory Stick) clocks from a reference input frequency, such as 27 MHz.
All PLLs support SSC (Spread-Spectrum Clocking). SSC can be Center-Spread or Down-Spread clocking. This is a common technique to reduce electro-magnetic interference (EMI).
Based on the PLL frequency and the divider settings, the internal loop-filter components are automatically adjusted to achieve high stability, and to optimize the jitter-transfer characteristics of each PLL.
The device supports non-volatile EEPROM programming for easy customization of the device to the application. It is preset to a factory-default configuration. It can be reprogrammed to a different application configuration before PCB assembly, or reprogrammed by in-system programming. All device settings are programmable through the SDA and SCL bus, a 2-wire serial interface.
Three programmable control inputs, S0, S1 and S2, can be used to control various aspects of operation including frequency selection, changing the SSC parameters to lower EMI, PLL bypass, power down, and choosing between low level or 3-state for the output-disable function.
The CDCEx949 operates in a 1.8-V environment. It operates within a temperature range of –40°C to 85°C.
Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
The CDCE949Perf-Evaluation Module will help to verify the functionality and performance of CDCE949 with the options of crystal and 1.8 V LVCMOS inputs. The outputs can be connected to the Oscilloscope directly with SMA cables. The below information/items can be included The EVM use’s (...)
Features
- Easy-to-use evaluation module for fast prototyping and application evaluation.
- Supporting the entire clock family.
- Easy and fast device programming through TI Pro-ClockT software.
- Evaluation of multiple crystals and reference clocks due to flexible input structure.
- EVM completely USB powered in factory (...)
Description
The clock generator CDCE(L)949 family has integrated EEPROM that allows the default frequency settings to be saved upon start up. CDCEL9XXPROGEVM is a programming board that allows a fast programming of prototyping samples or small production quantities. It applies to all 8 devices in the family (...)
Software development
- CDCE949
- CDCE937
- CDCE925
- CDCE913
- CDCE906
- CDCE706
- CDCEL949
- CDCEL937
- CDCEL925
- CDCEL913
It is intended to be used with the evaluation modules of the above devices.
Features
- Easy and fast device programming through EEPROM, I2C
- Based on Labview
Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
Reference designs
Design files
-
download TIDA-010057 BOM.pdf (157KB) -
download TIDA-010057 Assembly Drawing.pdf (285KB) -
download TIDA-010057 PCB.pdf (3590KB) -
download TIDA-010057 Gerber.zip (3652KB) -
download TIDA-010057 CAD Files (Rev. A).zip (6926KB)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
TSSOP (PW) | 24 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
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