The CY74FCT399T is a high-speed quad 2-input register that selects four bits of data from either of two sources (ports) under control of a common select (S) input. Selected data are transferred to a 4-bit output register synchronous with the low-to-high transition of the clock (CP) input. The 4-bit D-type output register is fully edge triggered. The data inputs (I0X, I1X) and S input must be stable only one setup time prior to, and hold time after, the low-to-high transition of CP for predictable operation. The CY74FCT399T has noninverted outputs.
This device is fully specified for partial-power-down applications using Ioff The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
|Part number||Order||Function||Technology Family||VCC (Min) (V)||VCC (Max) (V)||Channels (#)||Voltage (Nom) (V)||F @ nom voltage (Max) (MHz)||ICC @ nom voltage (Max) (mA)||tpd @ nom Voltage (Max) (ns)||Configuration||Type||IOL (Max) (mA)||IOH (Max) (mA)||Rating||Operating temperature range (C)||Package Group||Package size: mm2:W x L (PKG)||Digital input leakage (Max) (uA)||ESD CDM (kV)||ESD HBM (kV)|
||Encoder||FCT||4.75||5.25||4||5||70||0.2||7||2:1||Push-pull||64||-32||Catalog||-40 to 85||SOIC | 16||16SOIC: 77 mm2: 7.5 x 10.3 (SOIC | 16)||5||0.75||2|