The \x92FCT543T octal latched transceivers contain two sets of eight D-type latches with separate latch-enable (LEAB\, LEBA\) and output-enable (OEAB\, OEBA\) inputs for each set to permit independent control of input and output in either direction of data flow. For data flow from A to B, for example, the A-to-B enable (CEAB\) input must be low in order to enter data from A or to take data from B, as indicated in the function table. With CEAB\ low, a low signal on the A-to-B latch-enable (LEAB\) input makes the A-to-B latches transparent; a subsequent low-to-high transition of the LEAB\ signal puts the A latches in the storage mode and their outputs no longer change with the A inputs. With CEAB\ and OEAB\ low, the 3-state B-output buffers are active and reflect the data present at the output of the A latches. Control of data from B to A is similar, but uses CEBA\, LEBA\, and OEBA\ inputs.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
|Part number||Order||Technology Family||VCC (Min) (V)||VCC (Max) (V)||Bits (#)||Voltage (Nom) (V)||F @ nom voltage (Max) (MHz)||ICC @ nom voltage (Max) (mA)||tpd @ nom Voltage (Max) (ns)||IOL (Max) (mA)||IOH (Max) (mA)||Operating temperature range (C)||Package Group|
||FCT||4.75||5.25||8||5||70||0.2||8.5||64||-32||-40 to 85||
SOIC | 24
SSOP | 24
|CY54FCT543T||Samples not available||FCT||4.75||5.25||8||5||70||0.2||8.5||64||-32||-55 to 125||
CDIP | 24
LCCC | 28