DS90C031B

ACTIVE

LVDS quad CMOS differential line driver

Product details

Function Driver Protocols LVDS Number of transmitters 4 Number of receivers 0 Supply voltage (V) 5 Signaling rate (Mbps) 155.5 Input signal CMOS, TTL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Driver Protocols LVDS Number of transmitters 4 Number of receivers 0 Supply voltage (V) 5 Signaling rate (Mbps) 155.5 Input signal CMOS, TTL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 16 59.4 mm² 9.9 x 6
  • >155.5 Mbps (77.7 MHz) switching rates
  • High impedance LVDS outputs with power-off
  • ±350 mV differential signaling
  • Ultra low power dissipation
  • 400 ps maximum differential skew (5V, 25°C)
  • 3.5 ns maximum propagation delay
  • Industrial operating temperature range
  • Pin compatible with DS26C31, MB571 (PECL) and 41LG (PECL)
  • Conforms to ANSI/TIA/EIA-644 LVDS standard
  • Offered in narrow body SOIC package
  • Fail-safe logic for floating inputs

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  • >155.5 Mbps (77.7 MHz) switching rates
  • High impedance LVDS outputs with power-off
  • ±350 mV differential signaling
  • Ultra low power dissipation
  • 400 ps maximum differential skew (5V, 25°C)
  • 3.5 ns maximum propagation delay
  • Industrial operating temperature range
  • Pin compatible with DS26C31, MB571 (PECL) and 41LG (PECL)
  • Conforms to ANSI/TIA/EIA-644 LVDS standard
  • Offered in narrow body SOIC package
  • Fail-safe logic for floating inputs

All trademarks are the property of their respective owners.

The DS90C031B is a quad CMOS differential line driver designed for applications requiring ultra low power dissipation and high data rates. The device supports data rates in excess of 155.5 Mbps (77.7 MHz) and uses Low Voltage Differential Signaling (LVDS) technology.

The DS90C031B accepts TTL/CMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition the driver supports a TRI-STATE function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an ultra low idle power state of 11 mW typical.

In addition, the DS90C031B provides power-off high impedance LVDS outputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present.

The DS90C031B and companion line receiver (DS90C032B) provide a new alternative to high power pseudo‐ECL devices for high speed point-to-point interface applications.

The DS90C031B is a quad CMOS differential line driver designed for applications requiring ultra low power dissipation and high data rates. The device supports data rates in excess of 155.5 Mbps (77.7 MHz) and uses Low Voltage Differential Signaling (LVDS) technology.

The DS90C031B accepts TTL/CMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition the driver supports a TRI-STATE function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an ultra low idle power state of 11 mW typical.

In addition, the DS90C031B provides power-off high impedance LVDS outputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present.

The DS90C031B and companion line receiver (DS90C032B) provide a new alternative to high power pseudo‐ECL devices for high speed point-to-point interface applications.

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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet DS90C031B LVDS Quad CMOS Differential Line Driver datasheet (Rev. B) 04 Mar 2013
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 03 Aug 2018
Application brief How to Terminate LVDS Connections with DC and AC Coupling 16 May 2018
Application note AN-1110 LVDS Quad Dynamic I CC vs Frequency 15 May 2004
Application note An Overview of LVDS Technology 05 Oct 1998

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