Product details

Function Receiver Protocols LVDS, CML, LVPECL Number of transmitters 0 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVDS, CML, LVPECL Output signal CMOS Rating Catalog Operating temperature range (C) -40 to 125
Function Receiver Protocols LVDS, CML, LVPECL Number of transmitters 0 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVDS, CML, LVPECL Output signal CMOS Rating Catalog Operating temperature range (C) -40 to 125
SOT-23 (DBV) 5 5 mm² 2.9 x 1.6
  • –40°C to +125°C Temperature Range Operation
  • Compatible With ANSI TIA/EIA-644-A Standard
  • >400-Mbps (200-MHz) Switching Rates
  • 100-ps Differential Skew (Typical)
  • 3.5-ns Maximum Propagation Delay
  • Integrated Line Termination Resistor (100 Ω Typical)
  • Single 3.3-V Power Supply Design (2.7-V to 3.6-V Range)
  • Power-Down High Impedance on LVDS Inputs
  • LVDS Inputs Accept LVDS/CML/LVPECL Signals
  • Pinout Simplifies PCB Layout
  • Low Power Dissipation (10 mW Typical at 3.3-V Static)
  • 5-Pin SOT-23 Package
  • –40°C to +125°C Temperature Range Operation
  • Compatible With ANSI TIA/EIA-644-A Standard
  • >400-Mbps (200-MHz) Switching Rates
  • 100-ps Differential Skew (Typical)
  • 3.5-ns Maximum Propagation Delay
  • Integrated Line Termination Resistor (100 Ω Typical)
  • Single 3.3-V Power Supply Design (2.7-V to 3.6-V Range)
  • Power-Down High Impedance on LVDS Inputs
  • LVDS Inputs Accept LVDS/CML/LVPECL Signals
  • Pinout Simplifies PCB Layout
  • Low Power Dissipation (10 mW Typical at 3.3-V Static)
  • 5-Pin SOT-23 Package

The DS90LT012AH is a single CMOS differential line receiver designed for applications requiring ultra-low power dissipation, low noise, and high data rates. The devices are designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Swing (LVDS) technology

The DS90LT012AH accepts low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The DS90LT012AH includes an input line termination resistor for point-to-point applications.

The DS90LT012AH and companion LVDS line driver DS90LV011AH provide a new alternative to high power PECL/ECL devices for high-speed interface applications.

The DS90LT012AH is a single CMOS differential line receiver designed for applications requiring ultra-low power dissipation, low noise, and high data rates. The devices are designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Swing (LVDS) technology

The DS90LT012AH accepts low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The DS90LT012AH includes an input line termination resistor for point-to-point applications.

The DS90LT012AH and companion LVDS line driver DS90LV011AH provide a new alternative to high power PECL/ECL devices for high-speed interface applications.

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Technical documentation

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Type Title Date
* Data sheet DS90LT012AH high temperature 3-V LVDS differential line receiver datasheet (Rev. B) 10 Jan 2019
Application note How Far, How Fast Can You Operate LVDS Drivers and Receivers? 03 Aug 2018
Application note An Overview of LVDS Technology 05 Oct 1998

Design & development

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SOT-23 (DBV) 5 View options

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