Product details


Function Reclocker Power consumption (mW) 430 Data rate (Max) (Gbps) 2.97 Control interface Pin, SMBus Operating temperature range (C) -40 to 85 open-in-new Find other Serial digital interface (SDI) ICs

Package | Pins | Size

WQFN (RHS) 48 49 mm² 7 x 7 WQFN (RSB) 40 25 mm² 5 x 5 open-in-new Find other Serial digital interface (SDI) ICs


  • Supports SMPTE ST-424, ST-292, and ST-259
    Serial Digital Video Standards
  • Supports 270-Mbps, 1.483-Gbps, 1.485-Gbps,
    2.967-Gbps, and 2.97-Gbps Serial Data Rate
  • Supports DVB-ASI at 270 Mbps
  • Single 3.3-V Supply Operation
  • 430-mW Typical Power Consumption
  • Integrated 4:1 Multiplexed Input
  • 0 to 30-inch FR4 Equalizer on Each Multiplexed
  • Two Differential, Reclocked Outputs
  • Choice of Second Reclocked Output or
    Recovered Clock Output
  • Single 27-MHz External Crystal or Reference
    Clock Input
  • Manual Rate Select Input
  • SD/HD Operating Rate Indicator Output
  • Lock Detect Indicator Output
  • Output Mute Function for Data and Clock
  • Auto/Manual Reclocker Bypass
  • Power Saver Mode With Device Power-Down
    Control (10-mW Typical Power Consumption in
    Disabled State)
  • Differential LVPECL-Compatible Serial
    Data Inputs and Outputs
  • LVCMOS Control Inputs and Indicator Outputs
  • 48-Pin WQFN or 40-Pin WQFN Package
  • Industrial Temperature Range: –40°C to 85°C
  • 48-Pin WQFN Version Footprint-Compatible with
    the LMH0056 and LMH0036
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The LMH0356 3-Gbps HD/SD SDI Reclocker with 4:1 Input Mux and FR4 EQs retimes serial digital video data conforming to the SMPTE ST-424, ST-292, and ST-259 standards. The LMH0356 operates at serial data rates of 270 Mbps, 1.483 Gbps, 1.485 Gbps, 2.967 Gbps, and 2.97 Gbps. The LMH0356 supports DVB-ASI operation at 270 Mbps. The LMH0356 includes an integrated 4:1 input multiplexer for selecting one of four input data streams for retiming. In addition, the four inputs of the LMH0356 each have an FR4 equalizer capable of equalizing 0 to 30 inches of FR4 trace length.

The LMH0356 automatically detects the incoming data rate and adjusts itself to retime the incoming data to suppress accumulated jitter. The LMH0356 recovers the serial data-rate clock and optionally provides it as an output. The LMH0356 has two differential serial data outputs; the second output may be selected as a low-jitter, data-rate clock output. Controls and indicators are: serial clock or second serial data output select, manual rate select input, SD/HD rate indicator output, lock detect output, auto/manual data bypass, output mute, and device enable. The serial data inputs, outputs, and serial clock outputs are differential LVPECL compatible. The CML serial data and serial clock outputs are suitable for driving 100-Ω differentially terminated networks. The control logic inputs and outputs are LVCMOS compatible.

The LMH0356 is powered from a single 3.3-V supply. Power dissipation is typically 430 mW. The device is available in two space-saving packages: a 7-mm × 7-mm, 48-pin WQFN and even more space-efficient 5-mm × 5-mm, 40-pin WQFN package.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 13
Type Title Date
* Datasheet LMH0356 3-Gbps HD/SD SDI Reclocker with 4:1 Input Mux and FR4 EQs datasheet (Rev. L) Jan. 12, 2016
Selection guide Broadcast and Professional Video Interface Solutions (Rev. E) Apr. 05, 2017
Application note AN-1943 Understanding Serial Digital Video Bit Rates (Rev. A) Apr. 26, 2013
Application note AN-1983 LMH0356 Customization with SMBus (Rev. A) Apr. 26, 2013
Application note AN-2145 Power Considerations for SDI Products (Rev. B) Apr. 26, 2013
Application note AN-2146 Power Design for SDI and Other Noise-Sensitive Devices (Rev. A) Apr. 26, 2013
User guide 3 Gbps HD SD SDI Reclocker with 4:1 Input Mux and FR4 EQs Eval Bd User Guide Jan. 26, 2012
Application note High-Speed Board Layout Challenges in FPGA/SDI Sub-Systems Nov. 12, 2009
Application note Reference Clock Loop Through Application Jan. 16, 2009
Application note Design Considerations for SMPTE 3 Gbps SDI Interfaces Jan. 15, 2009
Application note 3G-SDI: 32 Loop Cascade Analysis Oct. 23, 2008
Application note DS25CP104 in 3G SDI Router Application Aug. 20, 2008
User guide Broadcast Video Owner's Manual Nov. 17, 2006

Design & development

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Hardware development


TI's SD356EVK enables evaluation of the LMH0356 3Gbps HD/SD SDI Reclocker with 4:1 Input MUX and FR4 Equalizers. The SD356EVK evaluation kit contains documentation and the Evaluation Board. To support the evaluation of the FR4 Equalizers, one input has a 30? input trace, one input has a 15? trace (...)

Design tools & simulation

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PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
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SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)

CAD/CAE symbols

Package Pins Download
WQFN (RHS) 48 View options
WQFN (RSB) 40 View options

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