16-bit 2.3- to 5.5-V I2C/SMBus I/O expander with interrupt, weak pull-up & config registers
Product details
Parameters
Package | Pins | Size
Features
- Low Standby-Current Consumption of 1 µA Max
- I2C to Parallel Port Expander
- Open-Drain Active-Low Interrupt Output
- 5-V Tolerant I/O Ports
- Compatible With Most Microcontrollers
- 400-kHz Fast I2C Bus
- Address by Three Hardware Address Pins for Use of up to Eight Devices
- Polarity Inversion Register
- Latched Outputs With High-Current Drive Capability for Directly Driving LEDs
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
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Description
This 16-bit I/O expander for the two-line bidirectional bus (I2C) is designed for 2.3-V to 5.5-V VCC operation. It provides general-purpose remote I/O expansion for most microcontroller families via the I2C interface [serial clock (SCL), serial data (SDA)].
The PCA9555 consists of two 8-bit Configuration (input or output selection), Input Port, Output Port, and Polarity Inversion (active high or active low operation) registers. At power on, the I/Os are configured as inputs. The system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or output is kept in the corresponding Input or Output register. The polarity of the Input Port register can be inverted with the Polarity Inversion register. All registers can be read by the system master.
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | PCA9555 Remote 16-bit I2C and SMBus I/O Expander with Interrupt Output and Configuration Registers datasheet (Rev. J) | Mar. 11, 2021 |
Application note | I2C Dynamic Addressing | Apr. 25, 2019 | |
Selection guide | Logic Guide (Rev. AB) | Jun. 12, 2017 | |
Application note | Choosing the Correct I2C Device for New Designs | Sep. 07, 2016 | |
Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | Dec. 02, 2015 | |
Application note | Understanding the I2C Bus | Jun. 30, 2015 | |
Application note | I2C Bus Pull-Up Resistor Calculation | Feb. 13, 2015 | |
Application note | Programming Fun Lights With TI's TCA6507 | Nov. 30, 2007 | |
Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | Jul. 08, 2004 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
Features
- GUI-based web application
- Exportable designs
- JSON file uploader
- Bill of materials generator
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
SOIC (DW) | 24 | View options |
SSOP (DB) | 24 | View options |
SSOP (DBQ) | 24 | View options |
TSSOP (PW) | 24 | View options |
TVSOP (DGV) | 24 | View options |
VQFN (RGE) | 24 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
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Support & training
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