SN54HC273-DIE

ACTIVE

Octal D-Type Flip Flops With - Clear, SN54HC273-DIE

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SN54HC273-DIE

ACTIVE

Product details

Parameters

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Features

  • Wide Operating Voltage Range
  • Outputs Can Drive Up To 10 LSTTL Loads
  • Low Power Consumption
  • Typical tpd = 12 ns
  • Low Input Current
  • Contain Eight Flip-Flops With
    Single-Rail Outputs
  • Direct Clear Input
  • Applications Include:
    • Buffer/Storage Registers
    • Shift Registers
    • Pattern Generators

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Description

Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not related directly to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output.

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Technical documentation

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Type Title Date
* Datasheet Rad-Tolerant Space Grade Die, Quadruple 2-Input Positive-AND Gate, SN54HC273-DIE datasheet Jun. 03, 2013
Selection guides Logic Guide (Rev. AB) Jun. 12, 2017
Application notes Implications of Slow or Floating CMOS Inputs (Rev. D) Jun. 23, 2016
Application notes Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
Application notes Power-Up Behavior of Clocked Devices (Rev. A) Feb. 06, 2015
User guides LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application notes Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
User guides Signal Switch Data Book (Rev. A) Nov. 14, 2003
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application notes TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
Application notes CMOS Power Consumption and CPD Calculation (Rev. B) Jun. 01, 1997
Application notes Designing With Logic (Rev. C) Jun. 01, 1997
Application notes Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application notes Live Insertion Oct. 01, 1996
Application notes SN54/74HCT CMOS Logic Family Applications and Restrictions May 01, 1996
Application notes Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc Apr. 01, 1996

Design & development

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