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Product details

Parameters

Number of transmitters 1 Number of receivers 1 Duplex Half Supply voltage (Nom) (V) 5 Signaling rate (Max) (Mbps) 0.25 IEC 61000-4-2 contact (+/- kV) 12 Isolated No Fault protection (V) -18 to 18 Number of nodes 256 Common mode range -7 to 12 ICC (Max) (mA) 0.9 Features IEC ESD protection Rating Catalog Operating temperature range (C) -40 to 85 open-in-new Find other RS-485 & RS-422 transceivers

Package | Pins | Size

SOIC (D) 8 19 mm² 4.9 x 3.9 open-in-new Find other RS-485 & RS-422 transceivers

Features

  • Bus I/O Protection
    • ±16-kV HBM Protection
    • ±12-kV IEC61000-4-2 Contact Discharge
    • +4-kV IEC61000-4-4 Fast Transient Burst
  • Industrial Temperature Range –40°C to 85°C
  • Large Receiver Hysteresis (60 mV Typical) for Noise Rejection
  • Low-Power Consumption
    • <1-µA Standby Current
    • <1-mA Quiescent Current
  • Signaling Rate Optimized for 250 kbps
  • Create a Custom Design Using the SN65HVD82 With the WEBENCH® Power Designer

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open-in-new Find other RS-485 & RS-422 transceivers

Description

This device has robust drivers and receivers for demanding industrial applications. The bus pins are robust to ESD events, with high levels of protection to Human-Body Model, Air-Gap Discharge, and Contact Discharge specifications.

The device combines a differential driver and a differential receiver, which operate from a single 5-V power supply. The driver differential outputs and the receiver differential inputs are connected internally to form a bus port suitable for half-duplex (two-wire bus) communication. The device features a wide common-mode voltage range making the device suitable for multi-point applications over long cable runs. The device is characterized from –40°C to 85°C.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 7
Type Title Date
* Datasheet SN65HVD82 Robust RS-485 Transceiver datasheet (Rev. B) Nov. 01, 2017
Technical articles How to calculate the power dissipation of high-speed RS-485 transceivers Jun. 14, 2018
Technical articles Get Connected: The basics of protecting RS-485 against ESD Oct. 23, 2015
Application note Correcting cross-wire faults in modern e-metering networks Oct. 28, 2013
User guide RS-485 Half-Duplex EVM User's Guide (Rev. B) Jun. 12, 2013
Application note 2Q 2013 Issue Analog Applications Journal Apr. 16, 2013
Application note RS-485 failsafe biasing: Old versus new transceivers Apr. 16, 2013

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
49
Description
The RS-485 half-duplex evaluation module (EVM) helps designers evaluate device performance, supporting fast development and analysis of data-transmission systems using any of the SN65HVD1x, SN65HVD2x, SN65HVD7x, SN65HVD8x and SN65HVD96 half-duplex transceivers. The EVM board comes without the RS-485 (...)
Features

The EVM lets you quickly, easily and accurately evaluate TI's family of RS-485 products.

Hardware:
  • RS-485 half-duplex EVM PWB
  • Screw-type SMA jacks and Bergstik headers serve as the I/O connections
  • Banana jacks serve as the DC power input terminals
EVALUATION BOARD Download
49
Description

The SN65HVD72EVM evaluation module (EVM) helps you evaluate device performance, supporting fast development and analysis of data transmission systems using the SN65HVD72, SN65HVD75 and SN65HVD78 transceivers. The EVM board comes with the SN65HVD75 (20 Mbps) device soldered to the board (...)

Features
  • The EVM lets you quickly, easily and accurately evaluate our SN65HVD7x family of RS-485 products
  • Hardware:
    • SN65HVD7X EVM PWB
  • Screw-type SMA jacks and Bergstik headers serve as the I/O connections
  • Banana jacks serve as the DC power input terminals

Design tools & simulation

SIMULATION MODEL Download
SLLM198.ZIP (45 KB) - IBIS Model
SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SIMULATION TOOL Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)

Reference designs

REFERENCE DESIGNS Download
IEC ESD, EFT, and Surge Protected RS-485 Reference Design
TIDA-00731 The TIDA-00731 is a reference design examining how to protect an RS-485 bus against lethal transient waveforms such as IEC ESD, IEC EFT, and IEC surge. The reference design shows the level of protection that can be achieved through the implementation of an external protection scheme on the bus lines (...)
document-generic Schematic
REFERENCE DESIGNS Download
RS-485 IEC ESD Reference Design
TIDA-00730 The TIDA-00730 is an reference design examining how to protect an RS-485 bus against leathal transient waveforms such as IEC ESD, IEC EFT, and IEC surge. The reference design shows the level of protection that can be achieved through the implementation of a TVS diode on the bus lines of a standard (...)
document-generic Schematic
REFERENCE DESIGNS Download
RS-485 Power Over Bus Reference Design
TIDA-00527 This design demonstrates the implementation of a buspowered RS-485 application and allows to evaluate different filters for the DC power. This saves the cost and space for a separate power wiring.

A new preferred approach by using On-off key modulation to transmit RS-485 signals over power line is (...)

document-generic Schematic

CAD/CAE symbols

Package Pins Download
SOIC (D) 8 View options

Ordering & quality

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  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

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