Product details


Function Repeater Protocols LVDM, LVDS Number of transmitters 2 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (Mbps) 250 Input signal LVDM Output signal LVDM Rating Catalog Operating temperature range (C) -40 to 85 open-in-new Find other LVDS, M-LVDS & PECL ICs

Package | Pins | Size

SOIC (D) 16 59 mm² 9.9 x 6 TSSOP (PW) 16 22 mm² 4.4 x 5 open-in-new Find other LVDS, M-LVDS & PECL ICs


  • Meets or Exceeds the Requirements of ANSI TIA/EIA-644-1995 Standard
  • Designed for Clock Rates up to 200 MHz (400 Mbps)
  • Designed for Data Rates up to 250 Mbps
  • Pin Compatible With SN65LVDS122 and SN65LVDT122, 1.5 Gbps 2x2 Crosspoint Switch From TI
  • ESD Protection Exceeds 12 kV on Bus Pins
  • Operates From a Single 3.3-V Supply
  • Low-Voltage Differential Signaling With Output Voltages of 350 mV Into:
    • 100- Load (SN65LVDS22)
    • 50- Load (SN65LVDM22)
  • Propagation Delay Time; 4 ns Typ
  • Power Dissipation at 400 Mbps of 150 mW
  • Bus Pins Are High Impedance When Disabled or With VCC Less Than 1.5 V
  • LVTTL Levels Are 5 V Tolerant
  • Open-Circuit Fail Safe Receiver

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The SN65LVDS22 and SN65LVDM22 are differential line drivers and receivers that use low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400 Mbps. The receiver outputs can be switched to either or both drivers through the multiplexer control signals S0 and S1. This allows the flexibility to perform splitter or signal routing functions with a single device.

The TIA/EIA-644 standard compliant electrical interface provides a minimum differential output voltage magnitude of 247 mV into a 100- load.

The intended application of these devices and signaling technique is for both point-to-point baseband (single termination) and multipoint (double termination) data transmissions over controlled impedance media. The transmission media may be printed-circuit board traces, backplanes, or cables. (Note: The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other application specific characteristics).

The SN65LVDS22 and SN65LVDM22 are characterized for operation from –40°C to 85°C.

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Technical documentation

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Type Title Date
* Data sheet Dual Multiplexed LVDS Repeaters datasheet (Rev. C) May 09, 2002
Application note How Far, How Fast Can You Operate MLVDS? Aug. 06, 2018
Application note An Introduction to M-LVDS and Clock and Data Distribution Applications (Rev. B) Apr. 26, 2013
Application note SPI-Based Data Acquisition/Monitor Using the TLC2551 Serial ADC (Rev. A) Nov. 20, 2001

Design & development

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Design tools & simulation

SLLM008.ZIP (33 KB) - IBIS Model
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PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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SOIC (D) 16 View options
TSSOP (PW) 16 View options

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