Up to 150 Mbps
Load The signaling rate is the number of voltage transitions that can be made per second.
The SN65LVDM31 incorporates four differential line drivers that implement the electrical characteristics
of low-voltage differential signaling. This product offers a low-power alternative to 5-V
PECL drivers with similar signal levels. Any of the four current-mode drivers will deliver a minimum
differential output voltage magnitude of 540 mV into a 100- load when enabled by either an
active-low or active-high enable input.
The intended application of this device and signaling technique is for both point-to-point and
multiplexed baseband data transmission over controlled impedance media of approximately 100 . The transmission media may be printed-circuit board
traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation
characteristics of the media and the noise coupling to the environment.
The SN65LVDM31 is characterized for operation from -40°C to 85°C.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | High Speed Differential Line Driver datasheet (Rev. C) | Feb 6, 2002 | |
| Application note | An Introduction to M-LVDS and Clock and Data Distribution Applications (Rev. C) | PDF | HTML | Jun 22, 2023 | |
| Application brief | How Far, How Fast Can You Operate MLVDS? | Aug 6, 2018 | ||
| User guide | Low Voltage Differential Signaling (LVDS) Evaluation Module (EVM) for Quad Drive (Rev. C) | Feb 16, 2010 | ||
| Application note | SPI-Based Data Acquisition/Monitor Using the TLC2551 Serial ADC (Rev. A) | Nov 20, 2001 | ||
| Application note | An Overview of LVDS Technology | Oct 5, 1998 |
For additional terms or required resources, click any title below to view the detail page where available.
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| SOIC (D) | 16 | Ultra Librarian |
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