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Product details

Parameters

Function Driver Protocols LVDM, LVDS Number of Tx 4 Number of Rx 0 Supply voltage (V) 3.3 Signaling rate (Mbps) 150 Input signal LVCMOS Output signal LVDM Rating Catalog Operating temperature range (C) -40 to 85 open-in-new Find other LVDS, M-LVDS & PECL ICs

Package | Pins | Size

SOIC (D) 16 59 mm² 9.9 x 6 open-in-new Find other LVDS, M-LVDS & PECL ICs

Features

  • Designed for Signaling Rates Up to 150 Mbps
  • Low-Voltage Differential Signaling With Typical Output Voltage of 700 mV and a 100- Load
  • Propagation Delay Time of 2.3 ns, Typical
  • Single 3.3-V Supply Operation
  • One Driver's Power Dissipation at 75 MHz, 50 mW, Typical
  • High-Impedance Outputs When Disabled or With VCC < 1.5 V
  • Bus-Pin ESD Protection Exceeds 12 kV
  • Low-Voltage CMOS (LVCMOS) Logic Input Levels Are 5-V Tolerant

The signaling rate is the number of voltage transitions that can be made per second.

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Description

The SN65LVDM31 incorporates four differential line drivers that implement the electrical characteristics of low-voltage differential signaling. This product offers a low-power alternative to 5-V PECL drivers with similar signal levels. Any of the four current-mode drivers will deliver a minimum differential output voltage magnitude of 540 mV into a 100- load when enabled by either an active-low or active-high enable input.

The intended application of this device and signaling technique is for both point-to-point and multiplexed baseband data transmission over controlled impedance media of approximately 100 . The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.

The SN65LVDM31 is characterized for operation from -40°C to 85°C.

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Technical documentation

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No results found. Please clear your search and try again. View all 5
Type Title Date
* Datasheet High Speed Differential Line Driver datasheet (Rev. C) Feb. 06, 2002
Application notes How Far, How Fast Can You Operate MLVDS? Aug. 06, 2018
Application notes An Introduction to M-LVDS and Clock and Data Distribution Applications (Rev. B) Apr. 26, 2013
User guides Low Voltage Differential Signaling (LVDS) Evaluation Module (EVM) for Quad Drive (Rev. C) Feb. 16, 2010
Application notes SPI-Based Data Acquisition/Monitor Using the TLC2551 Serial ADC (Rev. A) Nov. 20, 2001

Design & development

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Design tools & simulation

SIMULATION MODELS Download
SLLC092.ZIP (4 KB) - IBIS Model
SIMULATION TOOLS Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

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SOIC (D) 16 View options

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