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High Noise Immunity 200Mbps M-LVDS Transceiver

SN65MLVD206B

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Product details

Parameters

Function Transceiver Protocols M-LVDS Number of Tx 1 Number of Rx 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 200 Input signal LVTTL, M-LVDS Output signal LVTTL, M-LVDS Rating Catalog Operating temperature range (C) -40 to 85 open-in-new Find other LVDS, M-LVDS & PECL ICs

Package | Pins | Size

SOIC (D) 8 19 mm² 4.9 x 3.9 open-in-new Find other LVDS, M-LVDS & PECL ICs

Features

  • Compatible with the M-LVDS standard TIA/EIA-899 for multipoint data interchange
  • Low-voltage differential 30-Ω to 55-Ω line driver and receiver for signaling rates(1) up to
    200 Mbps, clock frequencies up to 100 MHz
    • Type-2 receiver provides an offset threshold to detect open-circuit and idle-bus conditions
  • Bus I/O Protection
    • ±8-kV HBM
    • ±8-kV IEC 61000-4-2 Contact discharge
  • Controlled driver output voltage transition times for improved signal quality
  • –1-V to 3.4-V Common-mode voltage range allows data transfer with 2 V of ground noise
  • Bus pins high impedance when disabled or VCC ≤ 1.5 V
  • 100-Mbps Device Available (SN65MLVD204B)
  • Improved Alternatives to SN65MLVD206 (1)

(1)The signaling rate of a line is the number of voltage transitions that are made per second expressed in the bps of the unit (bits per second).

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Description

The SN65MLVD206B device is a multipoint low-voltage differential signaling (M-LVDS) line driver and receiver which is optimized to operate at signaling rates up to 200 Mbps. This device has a robust 3.3-V driver and receiver in the standard SOIC footprint for demanding industrial applications. The bus pins are robust to ESD events, with high levels of protection to human-body model and IEC contact discharge specifications.

The device combines a differential driver and a differential receiver (transceiver), which operates from a single 3.3-V supply. The transceiver is optimized to operate at signaling rates up to 200 Mbps.

The SN65MLVD206B has enhancements over similar devices. Improved features include a controlled slew rate on the driver output to help minimize reflections from unterminated stubs, resulting in better signal integrity. The same footprint definition was maintained, allowing for an easy drop-in replacement for a system performance upgrade. The devices are characterized for operation from –40°C to 85°C.

The SN65MLVD206B M-LVDS transceiver is part of the TI extensive M-LVDS portfolio.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 6
Type Title Date
* Datasheet SN65MLVD206B Multipoint-LVDS Line Driver and Receiver (Transceiver) With IEC ESD Protection datasheet (Rev. A) Feb. 06, 2018
Application notes Applications of Low-Voltage Differential Signaling (LVDS) in Ultrasound Scanners Jun. 29, 2019
Application notes How Far, How Fast Can You Operate MLVDS? Aug. 06, 2018
Technical articles Why should you care about the noise immunity of MLVDS drivers and receivers? Jul. 26, 2017
Application notes An Introduction to M-LVDS and Clock and Data Distribution Applications (Rev. B) Apr. 26, 2013
Application notes SPI-Based Data Acquisition/Monitor Using the TLC2551 Serial ADC (Rev. A) Nov. 20, 2001

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
99
Description
This evaluation module is for the SN65MLVD203B and SN65MLVD204B, which are M-LVDS transceivers.
The SN65MLVD203B is a full-duplex transceiver, and the SN65MLVD204B is a half-duplex transceiver.
Features
  • Can combine MLVD20XBEVM boards to simulate multiple receiver nodes
  • Includes footprints for D package version of devices, so entire family of SN65MLVD20X transceivers can be evaluated
  • Flexible termination
  • This evaluation module has the complete circuit for the full-duplex and half-duplex M-LVDS (...)

Design tools & simulation

SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SIMULATION TOOLS Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

CAD/CAE symbols

Package Pins Download
SOIC (D) 8 View options

Ordering & quality

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