Hex Buffers/Drivers With Open-Collector High-Voltage Outputs
Product details
Parameters
Package | Pins | Size
Features
- Convert TTL Voltage Levels to MOS Levels
- High Sink-Current Capability Design
- Open-Collector Driver for Indicator Lamps
- Inputs Fully Compatible With Most TTL Circuits
- On Products Compliant to MIL-PRF-38535, All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing of All Parameters.
Description
These TTL hex buffers and drivers feature high-voltage open-collector outputs for interfacing with high-level circuits (such as MOS) or for driving high-current loads (such as lamps or relays), and also are characterized for use as buffers for driving TTL inputs. The SN5407 and SN7407 devices have minimum breakdown voltages of 30 V, and the SN5417 and SN7417 devices have minimum breakdown voltages of 15 V. The maximum sink current is 30 mA for the SN5407 and SN5417 devices and 40 mA for the SN7407 and SN7417 devices.
These devices perform the Boolean function Y = A in positive logic.
These circuits are completely compatible with most TTL families. Inputs are diode clamped to minimize transmission-line effects, which simplifies design. Typical power dissipation is 145 mW, and average propagation delay time is 14 ns.
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | SNx407 and SNx417 Hex Buffers and Drivers With Open-Collector High-Voltage Outputs datasheet (Rev. H) | Sep. 27, 2016 |
Selection guide | Logic Guide (Rev. AB) | Jun. 12, 2017 | |
Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | Dec. 02, 2015 | |
User guide | LOGIC Pocket Data Book (Rev. B) | Jan. 16, 2007 | |
Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | Jul. 08, 2004 | |
More literature | Logic Cross-Reference (Rev. A) | Oct. 07, 2003 | |
Application note | Designing With Logic (Rev. C) | Jun. 01, 1997 | |
Application note | Input and Output Characteristics of Digital Integrated Circuits | Oct. 01, 1996 | |
Application note | Live Insertion | Oct. 01, 1996 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
Features
- Board design allows for versatility in evaluation
- Supports a wide-range of logic devices
Design tools & simulation
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
PDIP (N) | 14 | View options |
SO (NS) | 14 | View options |
SOIC (D) | 14 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Support & training
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