Product details

Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Number of channels 8 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type TTL Output type CMOS Features Balanced outputs, Positive input clamp diode, Very high speed (tpd 5-10ns) Technology family ACT Rating Catalog Operating temperature range (°C) -40 to 85
Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Number of channels 8 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type TTL Output type CMOS Features Balanced outputs, Positive input clamp diode, Very high speed (tpd 5-10ns) Technology family ACT Rating Catalog Operating temperature range (°C) -40 to 85
PDIP (N) 20 228.702 mm² 24.33 x 9.4 SOIC (DW) 20 131.84 mm² 12.8 x 10.3 SOP (NS) 20 98.28 mm² 12.6 x 7.8 SSOP (DB) 20 56.16 mm² 7.2 x 7.8 TSSOP (PW) 20 41.6 mm² 6.5 x 6.4 VQFN (RKS) 20 11.25 mm² 4.5 x 2.5 VSSOP (DGS) 20 24.99 mm² 5.1 x 4.9
  • VCC operation of 4.5V to 5.5V
  • Inputs accept voltages to 5.5V
  • Max tpd of 8ns at 5V
  • Inputs are TTL-voltage compatible
  • VCC operation of 4.5V to 5.5V
  • Inputs accept voltages to 5.5V
  • Max tpd of 8ns at 5V
  • Inputs are TTL-voltage compatible

The ’AC245 octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

The ’AC245 octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

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Technical documentation

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Type Title Date
* Data sheet SNx4ACT245 Octal Bus Transceivers With 3-State Outputs datasheet (Rev. H) PDF | HTML 12 Apr 2024
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Evaluation board

14-24-NL-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin non-leaded packages

14-24-NL-LOGIC-EVM is a flexible evaluation module (EVM) designed to support any logic or translation device that has a 14-pin to 24-pin BQA, BQB, RGY, RSV, RJW or RHL package.

User guide: PDF | HTML
Not available on TI.com
Simulation model

SN74ACT245 IBIS Model

SCAM044.ZIP (19 KB) - IBIS Model
Package Pins CAD symbols, footprints & 3D models
PDIP (N) 20 Ultra Librarian
SOIC (DW) 20 Ultra Librarian
SOP (NS) 20 Ultra Librarian
SSOP (DB) 20 Ultra Librarian
TSSOP (PW) 20 Ultra Librarian
VQFN (RKS) 20 Ultra Librarian
VSSOP (DGS) 20 Ultra Librarian

Ordering & quality

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Information included:
  • Fab location
  • Assembly location

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