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SN74ALS153

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Dual 1-of-4 Data Selectors/Multiplexers

Data sheet
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Dual 1-of-4 Data Selectors/Multiplexers

SN74ALS153

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Data sheet Order now

Product details

Parameters

Technology Family ALS Function Digital Multiplexer Configuration 4:1 Channels (#) 2 Supply voltage (Min) (V) 4.5 Supply voltage (Max) (V) 5.5 Input type Bipolar Output type Push-Pull Data rate (Max) (Mbps) 150 ICC (Max) (uA) 10000 open-in-new Find other Encoders & decoders

Package | Pins | Size

PDIP (N) 16 181 mm² 19.3 x 9.4 SOIC (D) 16 59 mm² 9.9 x 6 SOP (NS) 16 80 mm² 10.2 x 7.8 open-in-new Find other Encoders & decoders

Features

  • Permit Multiplexing From n Lines to One Line
  • Perform Parallel-to-Serial Conversion
  • Strobe (Enable) Line Provided for Cascading (n Lines to n Lines)
  • ´ALS253 and SN74AS253A Are 3-State Versions of These Parts
  • Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

 

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Description

These dual 1-of-4 data selectors/multiplexers contain inverters and drivers to supply full binary decoding data selection to the AND-OR gates. Separate strobe (G\) inputs are provided for each of the two 4-line sections.

The SN54ALS153 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS153 and SN74AS153 are characterized for operation from 0°C to 70°C.

 

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 12
Type Title Date
* Datasheet Dual 1-of-4 Data Selectors/Multiplexers datasheet (Rev. A) Dec. 01, 1994
Selection guide Logic Guide (Rev. AB) Jun. 12, 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guide LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) Aug. 01, 1997
Application note Designing With Logic (Rev. C) Jun. 01, 1997
Application note Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application note Live Insertion Oct. 01, 1996
Application note Advanced Schottky (ALS and AS) Logic Families Aug. 01, 1995

Design & development

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Hardware development

EVALUATION BOARD Download
document-generic User guide
10
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices
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CAD/CAE symbols

Package Pins Download
PDIP (N) 16 View options
SO (NS) 16 View options
SOIC (D) 16 View options

Ordering & quality

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  • Ongoing reliability monitoring

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