These octal positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct-clear () input.
Information at the data (D) inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input signal has no effect at the output.
The SN54ALS273 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS273 is characterized for operation from 0°C to 70°C.
|Part number||Order||Technology Family||Input type||Output type||VCC (Min) (V)||VCC (Max) (V)||IOL (Max) (mA)||IOH (Max) (mA)||Rating||Package Group|
PDIP | 20
SOIC | 20
SO | 20
|SN54ALS273||Samples not available||ALS||TTL||TTL||4.5||5.5||24||-2.6||Military||
CDIP | 20
CFP | 20
LCCC | 20