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SN74AS158

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Quadruple 1-of-2 Data Selectors/Multiplexers

Data sheet
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Quadruple 1-of-2 Data Selectors/Multiplexers

SN74AS158

ACTIVE
Data sheet Order now

Product details

Parameters

Technology Family AS Function Digital Multiplexer Configuration 2:1 Channels (#) 4 Supply voltage (Min) (V) 4.5 Supply voltage (Max) (V) 5.5 Input type Bipolar Output type Push-Pull Data rate (Max) (Mbps) 250 ICC (Max) (uA) 22500 open-in-new Find other Encoders & decoders

Package | Pins | Size

PDIP (N) 16 181 mm² 19.3 x 9.4 SOIC (D) 16 59 mm² 9.9 x 6 open-in-new Find other Encoders & decoders

Features

  • Buffered Inputs and Outputs
  • Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

 

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Description

These data selectors/multiplexers contain inverters and drivers to supply full data selection to the four output gates. A separate strobe (G\) input is provided. A 4-bit word is selected from one of two sources and is routed to the four outputs. The ´ALS157A and SN74AS157 present true data. The ´ALS158 and SN74AS158 present inverted data to minimize propagation delay time.

The SN54ALS157A and SN54ALS158 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS157A, SN74ALS158, SN74AS157, and SN74AS158 are characterized for operation from 0°C to 70°C.

 

 

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Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet Quadruple 1-of-2 Data Selectors/Multiplexers datasheet (Rev. C) Dec. 01, 1994
Selection guide Logic Guide (Rev. AB) Jun. 12, 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guide LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
Application note Designing With Logic (Rev. C) Jun. 01, 1997
Application note Advanced Schottky Load Management Feb. 01, 1997
Application note Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application note Live Insertion Oct. 01, 1996
Application note Advanced Schottky (ALS and AS) Logic Families Aug. 01, 1995

Design & development

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Hardware development

EVALUATION BOARD Download
document-generic User guide
10
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices
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CAD/CAE symbols

Package Pins Download
PDIP (N) 16 View options
SOIC (D) 16 View options

Ordering & quality

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