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SN74AXC1T45 ACTIVE Single-bit dual-supply bus transceiver Pin-to-pin upgrade with a wider voltage range and improved performance
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Product details

Parameters

Technology Family AVC Applications GPIO Bits (#) 1 High input voltage (Min) (Vih) 0.78 High input voltage (Max) (Vih) 3.6 Output voltage (Min) (V) 1.2 Output voltage (Max) (V) 3.6 IOH (Max) (mA) -12 IOL (Max) (mA) 12 Rating Catalog open-in-new Find other Direction-controlled voltage translators

Package | Pins | Size

DSBGA (YZP) 6 2 mm² .928 x 1.428 SOT-23 (DBV) 6 5 mm² 2.9 x 1.6 SOT-5X3 (DRL) 6 2 mm² 1.65 x 1.2 SOT-SC70 (DCK) 6 4 mm² 2 x 2.1 open-in-new Find other Direction-controlled voltage translators

Features

  • Available in the Texas Instruments NanoFree Package
  • Fully Configurable Dual-Rail Design Allows Each Port to
    Operate Over the Full 1.2-V to 3.6-V Power-Supply Range
  • VCC Isolation Feature - If Either VCC
    Input Is At GND, Both Ports Are In The High-Impedance State
  • DIR Input Circuit Referenced to VCCA
  • ±12-mA Output Drive at 3.3 V
  • I/Os Are 4.6-V Tolerant
  • Ioff Supports Partial-Power-Down Mode Operation
  • Typical Max Data Rates
    • 500 Mbps (1.8-V to 3.3-V Translation)
    • 320 Mbps (<1.8-V to 3.3-V Translation)
    • 320 Mbps (Translate to 2.5 V or 1.8 V)
    • 280 Mbps (Translate to 1.5 V)
    • 240 Mbps (Translate to 1.2 V)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • ±2000-V Human Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • ±1000-V Charged-Device Model (C101)
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Description

This single-bit noninverting bus transceiver uses two separate configurable power-supply rails. The SN74AVC1T45 is optimized to operate with VCCA/VCCB set at 1.4 V to 3.6 V. It is operational with VCCA/VCCB as low as 1.2 V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage, bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVC1T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.

The SN74AVC1T45 is designed so that the DIR input is powered by VCCA.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance state.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 18
Type Title Date
* Datasheet SN74AVC1T45 Single-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation and 3-State Outputs datasheet (Rev. H) Dec. 23, 2014
Selection guide Voltage translation buying guide Jun. 13, 2019
User guide Generic AVC and LVC Direction Controlled Translation EVM (Rev. A) Feb. 18, 2019
Selection guide Logic Guide (Rev. AB) Jun. 12, 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
Application note Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B) Apr. 30, 2015
User guide TI Power Reference Design for Xilinx® Artix®-7 (AC701) May 12, 2014
User guide PMP7977 User's Guide Sep. 11, 2013
User guide LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
Application note Selecting the Right Level Translation Solution (Rev. A) Jun. 22, 2004
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
More literature LCD Module Interface Application Clip May 09, 2003
User guide AVC Advanced Very-Low-Voltage CMOS Logic Data Book, March 2000 (Rev. C) Aug. 20, 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards Jun. 13, 2002
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) May 22, 2002
Application note Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B) Jul. 07, 1999
Application note AVC Logic Family Technology and Applications (Rev. A) Aug. 26, 1998

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
10
Description
Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices
EVALUATION BOARD Download
document-generic User guide
20
Description

The generic EVM is designed to support one, two, four and eight channel LVC and AVC direction-controlled translation devices. It also supports the bus hold and automotive -Q1 devices in the same number of channels. The AVC are low voltage translation devices with lower drive strength of 12mA. LVC is (...)

Features
  • SMB connector available for high speed operation
  • Ground port available on each header pin to maintain signal integrity
  • DIR and OE have 10K ohm pull up /pull down resistor options
  • Designed to support up to 20 different devices
DEVELOPMENT KIT Download
document-generic User guide
699
Description

The EVMK2GX (also known as "K2G") 1GHz evaluation module (EVM) enables developers to immediately start evaluating the 66AK2Gx processor family, and to accelerate the development of audio, industrial motor control, smart grid protection and other high reliability, real-time compute intensive (...)

Features
  • 66AK2G12 C66x DSP+Arm Cortex-A15 processor at 1GHz
  • 2-GByte DDR3L with ECC
  • TPS65911A PMIC
  • Audio and serial expansion headers
  • Processor SDK Linux and TI-RTOS support

Design tools & simulation

SIMULATION MODEL Download
SCEM436B.ZIP (118 KB) - IBIS Model
PCB LAYOUT Download
TIDU151.PDF (6781 KB)

Reference designs

Many TI reference designs include the SN74AVC1T45 Use our reference design selection tool to review and identify designs that best match your application and parameters.

CAD/CAE symbols

Package Pins Download
DSBGA (YZP) 6 View options
SC70 (DCK) 6 View options
SOT-23 (DBV) 6 View options
SOT-5X3 (DRL) 6 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Support & training

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