SN74AVC1T45

• Available in the Texas Instruments NanoFree Package
• Fully Configurable Dual-Rail Design Allows Each Port to
  Operate Over the Full 1.2-V to 3.6-V Power-Supply Range
• V_CC Isolation Feature - If Either V_CC
  Input Is At GND, Both Ports Are In The High-Impedance State
• DIR Input Circuit Referenced to V_CCA
• ±12-mA Output Drive at 3.3 V
• I/Os Are 4.6-V Tolerant
• I_off Supports Partial-Power-Down Mode Operation
• Typical Max Data Rates
  • 500 Mbps (1.8-V to 3.3-V Translation)
  • 320 Mbps (<1.8-V to 3.3-V Translation)
  • 320 Mbps (Translate to 2.5 V or 1.8 V)
  • 280 Mbps (Translate to 1.5 V)
  • 240 Mbps (Translate to 1.2 V)
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • ±2000-V Human Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • ±1000-V Charged-Device Model (C101)

This single-bit noninverting bus transceiver uses two separate configurable power-supply rails. The SN74AVC1T45 is optimized to operate with V_CCA/V_CCB set at 1.4 V to 3.6 V. It is operational with V_CCA/V_CCB as low as 1.2 V. The A port is designed to track V_CCA. V_CCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track V_CCB. V_CCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage, bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVC1T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess I_CC and I_CCZ.

The SN74AVC1T45 is designed so that the DIR input is powered by V_CCA.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The V_CC isolation feature ensures that if either V_CC input is at GND, then both ports are in the high-impedance state.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.