SN74BCT29827B

ACTIVE

10-Bit Buffers/Drivers With 3-State Outputs

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10-Bit Buffers/Drivers With 3-State Outputs

SN74BCT29827B

ACTIVE

Product details

Parameters

Technology Family BCT VCC (Min) (V) 4.5 VCC (Max) (V) 5.5 Channels (#) 10 IOL (Max) (mA) 48 IOH (Max) (mA) -24 Input type Bipolar Output type 3-State Features Very high speed (tpd 5-10ns), Over-voltage tolerant inputs, Power up 3-state Data rate (Mbps) 140 Rating Catalog open-in-new Find other Non-Inverting buffer/driver

Package | Pins | Size

SOIC (DW) 24 160 mm² 15.5 x 10.3 open-in-new Find other Non-Inverting buffer/driver

Features

  • State-of-the-Art BiCMOS Design Significantly Reduces ICCZ
  • ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
  • P-N-P Inputs Reduce DC Loading
  • Flow-Through Architecture Optimizes PCB Layout
  • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W), and Standard Plastic and Ceramic 300-mil DIPs (JT, NT)
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Description

These 10-bit buffers and bus drivers provide high-performance bus interface for wide data paths or buses carrying parity.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (or ) input is high, all ten outputs are in the high-impedance state. The outputs are also in the high-impedance state during power-up and power-down conditions. The outputs remain in the high-impedance state while the device is powered down.

The SN54BCT29827B is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74BCT29827B is characterized for operation from 0°C to 70°C.

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Technical documentation

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Type Title Date
* Datasheet 10-Bit Buffers/Drivers With 3-State Outputs datasheet (Rev. C) Nov. 01, 1993
Selection guides Logic Guide (Rev. AB) Jun. 12, 2017
Application notes Implications of Slow or Floating CMOS Inputs (Rev. D) Jun. 23, 2016
Application notes Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
Solution guides LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application notes Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application notes TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
Application notes Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) Aug. 01, 1997
Application notes Designing With Logic (Rev. C) Jun. 01, 1997
Application notes Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application notes Live Insertion Oct. 01, 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
$10.00
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices

Design tools & simulation

SIMULATION MODELS Download
SCBM126.ZIP (7 KB) - PSpice Model

CAD/CAE symbols

Package Pins Download
SOIC (DW) 24 View options

Ordering & quality

Support & training

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Videos

Anatomy of a logic part number

Logic part numbers use a formulaic naming system to denote the device's functionality and features. This video reviews the components to a logic part's name.

Posted: 22-Jan-2018
Duration: 01:26

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