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SN74HCS595

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8-bit shift register with Schmitt-trigger inputs and 3-state output registers

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Product details

Parameters

Bits (#) 8 Technology Family HCS VCC (Min) (V) 2 VCC (Max) (V) 6 Input type Schmitt-Trigger Output type 3-State IOL (Max) (mA) 7.8 IOH (Max) (mA) -7.8 open-in-new Find other Shift register

Package | Pins | Size

SOIC (D) 16 59 mm² 9.9 x 6 TSSOP (PW) 16 TSSOP (PW) 16 22 mm² 5 x 4.4 WQFN (BQB) 16 open-in-new Find other Shift register

Features

  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V
  • Extended ambient temperature range: –40°C to +125°C, TA

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Description

The SN74HCS595 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. All inputs include Schmitt-trigger architecture, eliminating any erroneous data outputs due to slow-edged or noisy input signals. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH’) for cascading. When the output-enable (OE) input is high, the storage register outputs are in a high-impedance state. Internal register data and serial output (QH’) are not impacted by the operation of the OE input.

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Preproduction samples are available (PSN74HCS595DR and PSN74HCS595BQBR). Request now

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Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet SN74HCS595 8-Bit Shift Register With Schmitt-Trigger Inputs datasheet (Rev. A) Oct. 23, 2020
Application note Increase the Number of Outputs on a Microcontroller Oct. 27, 2020
Application note Driving Indicator LEDs Oct. 15, 2020

Design & development

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Hardware development

EVALUATION BOARD Download
10
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices
EVALUATION BOARD Download
20
Description
Flexible EVM designed to support any logic or translation device that has a BQA, BQB, RGY (14-24 pin), RSV, RJW, or RHL package.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic and translation devices with included dual supply support
  • Board has 9 sections that can be broken apart for a smaller form factor

Design tools & simulation

SIMULATION MODEL Download
SCLM163B.ZIP (93 KB) - IBIS Model

CAD/CAE symbols

Package Pins Download
SOIC (D) 16 View options
TSSOP (PW) 16 View options
WQFN (BQB) 16 View options

Ordering & quality

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