SN74LV74A Dual Positive-Edge-Triggered D-Type Flip-Flops | TI.com

SN74LV74A
This product has been released to the market and is available for purchase. For some products, newer alternatives may be available.
Dual Positive-Edge-Triggered D-Type Flip-Flops

 

Description

These dual positive-edge-triggered D-type flip-flops are designed for 2-V to 5.5-V VCC operation.

Features

  • 2-V to 5.5-V VCC Operation
  • Maximum tpd of 8.5 ns at 5 V
  • Typical VOLP (Output Ground Bounce)
    < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    > 2.3 V at VCC = 3.3 V, TA = 25°C
  • Support Mixed-Mode Voltage Operation on
    All Ports
  • Ioff Supports Partial-Power-Down
    Mode Operation
  • Latch-up Performance Exceeds 250 mA
    Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 500-V Charged-Device Model (C101)

Parametrics

Compare all products in D-type flip-flop Email Download to Excel
Part number Order Technology Family Input type Output type VCC (Min) (V) VCC (Max) (V) IOL (Max) (mA) IOH (Max) (mA) Rating Package Group
SN74LV74A Order now LV-A     CMOS     CMOS     2     5.5     50     -50     Catalog     SOIC | 14
SO | 14
SSOP | 14
TSSOP | 14
TVSOP | 14
VQFN | 14    
SN74LV74A-EP Samples not available LV-A     CMOS     CMOS     2     5.5     50     -50     HiRel Enhanced Product     TSSOP | 14    
SN74LV74A-Q1 Order now LV-A     CMOS     CMOS     2     5.5     50     -50     Automotive     SOIC | 14
TSSOP | 14