SN74S85 4-bit magnitude comparators | TI.com

SN74S85
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4-bit magnitude comparators

4-bit magnitude comparators - SN74S85
Datasheet
 

Description

These four-bit magnitude comparators perform comparison of straight binary and straight BCD (8-4-2-1) codes. Three fully decoded decisions about two 4-bit words (A, B) are made and are externally available at three outputs. These devices are fully expandable to any number of bits without external gates. Words of greater length may be compared by connecting comparators in cascade. The A > B, A < B, and A = B outputs of a stage handling less-significant bits are connected to the corresponding A > B, A < B, and A = B inputs of the next stage handling more-significant bits. The stage handling the least-significant bits must have a high-level voltage applied to the A = B input. The cascading paths of the '85, 'LS85, and 'S85 are implemented with only a two-gate-level delay to reduce overall comparison times for long words. An alternate method of cascading which further reduces the comparison time is shown in the typical application data.

Features

 

Parametrics

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Part number Order Technology Family VCC (Min) (V) VCC (Max) (V) Bits (#) Voltage (Nom) (V) F @ nom voltage (Max) (MHz) ICC @ nom voltage (Max) (mA) tpd @ nom Voltage (Max) (ns) IOL (Max) (mA) IOH (Max) (mA) Operating temperature range (C) Package Group
SN74S85 Order now S     4.75     5.25     4     5     50     110     18     20     -1     0 to 70     PDIP | 16
SOIC | 16    
SN54S85 Samples not available S     4.75     5.25     4     5     50     110     18     20/-1       -55 to 125     CDIP | 16
LCCC | 20