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Product details

Parameters

Number of I/Os 18 Features 1-MHz maximum frequency, Configuration registers, Interrupt pin, Reset pin Supply voltage (Min) (V) 1.65 Supply voltage (Max) (V) 3.6 Addresses 1 Rating Catalog Frequency (Max) (kHz) 1000 Operating temperature range (C) -40 to 85 open-in-new Find other I2C general-purpose I/Os (GPIOs)

Package | Pins | Size

DSBGA (YFP) 25 0 mm² 2 x 2 open-in-new Find other I2C general-purpose I/Os (GPIOs)

Features

  • Operating Power-Supply Voltage Range of 1.65 V to 3.6 V
  • 18 GPIOs Configurable as Inputs or Outputs
  • ESD Protection Exceeds JESD 22 on Non-GPIO Pins
    • 2000-V Human Body Model (A114-A)
    • 1000-V Charged Device Model (C101)
  • Low Standby (Idle) Current Consumption: 3 µA
  • Supports 1-MHz Fast Mode Plus I2C Bus
  • Open-Drain Active-Low Interrupt Output, Asserted When Key is Pressed
    or Key is Released
  • Selectable Debounce Time of 50 µs
  • Schmitt-Trigger Action Allows Slow Input Transition and
    Better Switching Noise Immunity at the SCL and SDA Inputs:
    Typical Vhys at 1.8 V is 0.18 V
  • Latch-Up Performance Exceeds 200 mA Per JESD 78, Class II
  • Very Small Package
    • WCSP (YFP): 2 mm × 2 mm; 0.4 mm pitch
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Description

The TCA6418E is a 18 channel GPIO expansion device with integrated ESD protection. It can operate from 1.65 V to 3.6 V and has 18 general purpose inputs/outputs (GPIO) that can be used via the I2C interface [serial clock (SCL), serial data (SDA)].

The major benefit of this device is it frees up the processor from having to individually monitor changes in multiple inputs and also frees up the GPIOs on the processor to drive other outputs.. This provides power and bandwidth savings. The TCA6418E is also ideal for usage with processors that have limited GPIOs.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 6
Type Title Date
* Datasheet I2C Controlled 18 Channel GPIO Expander datasheet Sep. 05, 2012
Application notes I2C Dynamic Addressing Apr. 25, 2019
Application notes Choosing the Correct I2C Device for New Designs Sep. 07, 2016
Application notes Understanding the I2C Bus Jun. 30, 2015
Application notes Maximum Clock Frequency of I2C Bus Using Repeaters May 15, 2015
Application notes I2C Bus Pull-Up Resistor Calculation Feb. 13, 2015

Design & development

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Design tools & simulation

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PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
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SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide
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I2C designer tool
I2C-DESIGNER — Use the I2C Designer tool to quickly resolve conflicts in addressing, voltage level and frequency in I2C based designs. Enter master and slave inputs to automatically generate an I2C tree or easily build a custom solution. This tool will help designers save time and comply with the I2C standard with (...)
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  • JSON file uploader
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DSBGA (YFP) 25 View options

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