Product details

Features Output Enable Frequency (Max) (kHz) 1000 VCCA (Min) (V) 1.08 VCCA (Max) (V) 3.6 VCCB (Min) (V) 1.08 VCCB (Max) (V) 3.6 Supply restrictions No rule Rating Catalog Operating temperature range (C) -40 to 125
Features Output Enable Frequency (Max) (kHz) 1000 VCCA (Min) (V) 1.08 VCCA (Max) (V) 3.6 VCCB (Min) (V) 1.08 VCCB (Max) (V) 3.6 Supply restrictions No rule Rating Catalog Operating temperature range (C) -40 to 125
SOT-23-THN (DDF) 8 8 mm² 2.9 x 2.8 X2SON (DTM) 8 1 mm² 0.8 x 1.35
  • 2-bit bidirectional translator for SDA and SCL lines in I2C applications
  • Provides bidirectional voltage translation with no direction pin
  • High-impedance output SCL_A, SDA_A, SCL_B, SDA_B pins when OE = 0 V or VCC = 0 V
  • Internal 10-kΩ pull-up resistor on all SDA and SCL pins are enabled based on respective VCC voltage
  • 1.08 V to 3.6 V on both A and B ports
  • VCC Isolation feature: If either VCC input is at GND, both ports are in the high-impedance state (excluding pull-ups)
  • No power-supply sequencing required: either VCCA or VCCB can be ramped first
  • Low Ioff of 2.5 µA when either VCCA or VCCB = 0 V
  • OE input can be tied directly to VCCA or controlled by GPIO
  • Latch-up performance exceeds 100 mA per JESD 78, class II
  • ESD Protection exceeds JESD 22
    • 2500-V Human-body model (A114-B)
    • 1500-V Charged-device model (C101)
  • 2-bit bidirectional translator for SDA and SCL lines in I2C applications
  • Provides bidirectional voltage translation with no direction pin
  • High-impedance output SCL_A, SDA_A, SCL_B, SDA_B pins when OE = 0 V or VCC = 0 V
  • Internal 10-kΩ pull-up resistor on all SDA and SCL pins are enabled based on respective VCC voltage
  • 1.08 V to 3.6 V on both A and B ports
  • VCC Isolation feature: If either VCC input is at GND, both ports are in the high-impedance state (excluding pull-ups)
  • No power-supply sequencing required: either VCCA or VCCB can be ramped first
  • Low Ioff of 2.5 µA when either VCCA or VCCB = 0 V
  • OE input can be tied directly to VCCA or controlled by GPIO
  • Latch-up performance exceeds 100 mA per JESD 78, class II
  • ESD Protection exceeds JESD 22
    • 2500-V Human-body model (A114-B)
    • 1500-V Charged-device model (C101)

The TCA9416 is a 2-bit bidirectional I2C and SMBus voltage-level translator with an output enable (OE) input and rising and falling edge accelerators. It is operational from 1.08 V to 3.6 V on both the A-side and B-side. This allows the device to interface between lower and higher logic signal levels at any of the typical 1.2-V, 1.8-V, 2.5-V, and 3.3-V supply rails.

The OE input pin is referenced to VCCA, can be tied directly to VCCA, but it is also 3.6-V tolerant. The OE pin can also be controlled and set to a logic low to place all the SCL and SDA pins in a high-impedance state, which significantly reduces the quiescent current consumption.

Under normal I2C and SMBus configurations, the TCA9416 is compatible with standard speeds where the frequency of SCL is 100 kHz (Standard-mode), 400 kHz (Fast-mode), or 1 MHz (Fast-mode Plus).

The TCA9416 features internal 10-kΩ pull-up resistors on SCL_A, SDA_A, SCL_B, and SDA_B. Additional external pull-up resistors can be added to the bus to reduce the total pull-up resistance and speed up rising edges.

The TCA9416 is a 2-bit bidirectional I2C and SMBus voltage-level translator with an output enable (OE) input and rising and falling edge accelerators. It is operational from 1.08 V to 3.6 V on both the A-side and B-side. This allows the device to interface between lower and higher logic signal levels at any of the typical 1.2-V, 1.8-V, 2.5-V, and 3.3-V supply rails.

The OE input pin is referenced to VCCA, can be tied directly to VCCA, but it is also 3.6-V tolerant. The OE pin can also be controlled and set to a logic low to place all the SCL and SDA pins in a high-impedance state, which significantly reduces the quiescent current consumption.

Under normal I2C and SMBus configurations, the TCA9416 is compatible with standard speeds where the frequency of SCL is 100 kHz (Standard-mode), 400 kHz (Fast-mode), or 1 MHz (Fast-mode Plus).

The TCA9416 features internal 10-kΩ pull-up resistors on SCL_A, SDA_A, SCL_B, and SDA_B. Additional external pull-up resistors can be added to the bus to reduce the total pull-up resistance and speed up rising edges.

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Technical documentation

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Type Title Date
* Data sheet TCA9416 Ultra-Low-Voltage I2C Translator with Rise Time Accelerators datasheet (Rev. A) PDF | HTML 06 Aug 2021
EVM User's guide TCA9416 Evaluation Module PDF | HTML 08 Mar 2021
Certificate TCA9416EVM EU Declaration of Conformity (DoC) 25 Feb 2021

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Evaluation board

TCA9416EVM — TCA9416 ultra-low voltage I2C translator with rise time accelerators evaluation module

This EVM provides configurable loading conditions through adjustable pull up resistors and bus capacitance which allows designers to easily test the performance of this device in their system.

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Simulation model

TCA9416 IBIS Model

SCPM047.ZIP (63 KB) - IBIS Model
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Use the I2C Designer tool to quickly resolve conflicts in addressing, voltage level and frequency in I2C based designs. Enter master and slave inputs to automatically generate an I2C tree or easily build a custom solution. This tool will help designers save time and comply with the I2C standard (...)
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SOT-23-THIN (DDF) 8 View options
X2SON (DTM) 8 View options

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