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Parameters

Features Buffer, Enable Pin Frequency (Max) (kHz) 400 VCCA (Min) (V) 0.9 VCCA (Max) (V) 5.5 VCCB (Min) (V) 2.7 VCCB (Max) (V) 5.5 Supply restrictions VCCA <= (VCCB-1) Rating Catalog Operating temperature range (C) -40 to 85 open-in-new Find other I2C level shifters, buffers & hubs

Package | Pins | Size

VSSOP (DGK) 8 15 mm² 3 x 4.9 X2QFN (RVH) 8 3 mm² 1.6 x 1.6 open-in-new Find other I2C level shifters, buffers & hubs

Features

  • Two-Channel Bidirectional Buffer
  • I2C Bus and SMBus Compatible
  • Operating Supply Voltage Range of
    2.7 V to 5.5 V on B side
  • Operating Voltage Range of 0.9 V to 5.5 V on
    A-Side
  • Voltage-Level Translation From
    0.9 V to 5.5 V and 2.7 V to 5.5 V
  • Active-High Repeater-Enable Input
  • Requires No External Pullup Resistors on
    Lower-Voltage Port-A
  • Open-Drain I2C I/O
  • 5.5-V Tolerant I2C and Enable Input Support Mixed-Mode Signal Operation
  • Lockup-Free Operation
  • Accommodates Standard Mode and Fast Mode I2C Devices and Multiple Masters
  • Supports Arbitration and Clock Stretching Across Repeater
  • Powered-Off High-Impedance I2C Bus Pins
  • Supports 400-kHz Fast I2C Bus Operating Speeds
  • Available in
    • 1.6-mm × 1.6-mm, 0.4-mm height, 0.5-mm Pitch QFN Package
    • 3-mm × 3-mm Industry Standard MSOP Package
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 1000-V Charged-Device Model (C101)

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Description

This TCA9509 integrated circuit is an I2C bus/SMBus Repeater for use in I2C/SMBus systems. It can also provide bidirectional voltage-level translation (up-translation/down-translation) between low voltages (down to 0.9 V) and higher voltages (2.7 V to 5.5 V) in mixed-mode applications. This device enables I2C and similar bus systems to be extended, without degradation of performance even during level shifting.

The TCA9509 buffers both the serial data (SDA) and the serial clock (SCL) signals on the I2C bus, thus allowing 400-pF bus capacitance on the B-side. This device can also be used to isolate two halves of a bus for voltage and capacitance.

The TCA9509 has two types of drivers – A-side drivers and B-side drivers. All inputs and B-side I/Os are overvoltage tolerant to 5.5 V. The A-side I/Os are overvoltage tolerant to 5.5 V when the device is unpowered (VCCB and/or VCCA = 0 V).

The bus port B drivers are compliant with SMBus I/O levels, while the A-side uses a current sensing mechanism to detect the input or output LOW signal which prevents bus lock-up. The A-side uses a 1 mA current source for pull-up and a 200 Ω pull-down driver. This results in a LOW on the A-side accommodating smaller voltage swings. The output pull-down on the A-side internal buffer LOW is set for approximately 0.2 V, while the input threshold of the internal buffer is set about 50 mV lower than that of the output voltage LOW. When the A-side I/O is driven LOW internally, the LOW is not recognized as a LOW by the input. This prevents a lock-up condition from occurring. The output pull-down on the B-side drives a hard LOW and the input level is set at 0.3 of SMBus or I2C-bus voltage level which enables B side to connect to any other I2C-bus devices or buffer.

The TCA9509 drivers are not enabled unless VCCA is above 0.8 V and VCCB is above 2.5 V. The enable (EN) pin can also be used to turn the drivers on and off under system control. Caution should be observed to only change the state of the EN pin when the bus is idle.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 6
Type Title Date
* Datasheet TCA9509 Level-Translating I2C and SMBUS Bus Repeater datasheet (Rev. C) Dec. 14, 2017
Application notes Why, When, and How to use I2C Buffers May 23, 2018
Application notes Choosing the Correct I2C Device for New Designs Sep. 07, 2016
Application notes Understanding the I2C Bus Jun. 30, 2015
Application notes Maximum Clock Frequency of I2C Bus Using Repeaters May 15, 2015
Application notes I2C Bus Pull-Up Resistor Calculation Feb. 13, 2015

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Design tools & simulation

SIMULATION MODELS Download
SLPM022.ZIP (75 KB) - IBIS Model
SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SIMULATION TOOLS Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide
DESIGN TOOLS Download
I2C designer tool
I2C-DESIGNER — Use the I2C Designer tool to quickly resolve conflicts in addressing, voltage level and frequency in I2C based designs. Enter master and slave inputs to automatically generate an I2C tree or easily build a custom solution. This tool will help designers save time and comply with the I2C standard with (...)
Features
  • GUI-based web application
  • Exportable designs
  • JSON file uploader
  • Bill of materials generator

CAD/CAE symbols

Package Pins Download
VSSOP (DGK) 8 View options
X2QFN (RVH) 8 View options

Ordering & quality

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