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Parameters

DSP 1 C674x On-chip L2 cache/RAM 64 KB Total on-chip memory (KB) 128 Operating system SYS/BIOS DRAM DDR2, LPDDR Ethernet MAC 10/100 Serial I/O I2C, McASP, McBSP, SPI, UART I2C 1 SPI 1 Operating temperature range (C) -40 to 105, 0 to 90 UART (SCI) 1 Rating Catalog open-in-new Find other C6000 floating-point DSPs

Package | Pins | Size

NFBGA (ZWT) 361 256 mm² 16 x 16 open-in-new Find other C6000 floating-point DSPs

Features

  • 200-MHz C674x Fixed- and Floating-Point VLIW DSP
  • C674x Instruction Set Features
    • Superset of the C67x+ and C64x+ ISAs
    • Up to 1600 MIPS and 1200 MFLOPS
    • Byte-Addressable (8-, 16-, 32-, and 64-Bit Data)
    • 8-Bit Overflow Protection
    • Bit-Field Extract, Set, Clear
    • Normalization, Saturation, Bit-Counting
    • Compact 16-Bit Instructions
  • C674x Two-Level Cache Memory Architecture
    • 32KB of L1P Program RAM/Cache
    • 32KB of L1D Data RAM/Cache
    • 64KB of L2 Unified Mapped RAM/Cache
    • Flexible RAM/Cache Partition (L1 and L2)
  • Enhanced Direct Memory Access Controller 3 (EDMA3):
    • 2 Channel Controllers
    • 3 Transfer Controllers
    • 64 Independent DMA Channels
    • 16 Quick DMA Channels
    • Programmable Transfer Burst Size
  • TMS320C674x Floating-Point VLIW DSP Core
    • Load-Store Architecture With Nonaligned Support
    • 64 General-Purpose Registers (32-Bit)
    • Six ALU (32- and 40-Bit) Functional Units
      • Supports 32-Bit Integer, SP (IEEE Single Precision/32-Bit) and DP (IEEE Double Precision/64-Bit) Floating Point
      • Supports up to Four SP Additions Per Clock, Four DP Additions Every Two Clocks
      • Supports up to Two Floating-Point (SP or DP) Reciprocal Approximation (RCPxP) and Square-Root Reciprocal Approximation (RSQRxP) Operations Per Cycle
    • Two Multiply Functional Units:
      • Mixed-Precision IEEE Floating-Point Multiply Supported up to:
        • 2 SP × SP → SP Per Clock
        • 2 SP × SP → DP Every Two Clocks
        • 2 SP × DP → DP Every Three Clocks
        • 2 DP × DP → DP Every Four Clocks
      • Fixed-Point Multiply Supports Two 32 × 32-Bit Multiplies, Four 16 × 16-Bit Multiplies, or Eight 8 × 8-Bit Multiplies per Clock Cycle, and Complex Multiples
    • Instruction Packing Reduces Code Size
    • All Instructions Conditional
    • Hardware Support for Modulo Loop Operation
    • Protected Mode Operation
    • Exceptions Support for Error Detection and Program Redirection
  • Software Support
    • TI DSPBIOS
    • Chip Support Library and DSP Library
  • 1.8-V or 3.3-V LVCMOS I/Os (Except for DDR2 Interfaces)
  • Two External Memory Interfaces:
    • EMIFA
      • NOR (8- or 16-Bit-Wide Data)
      • NAND (8- or 16-Bit-Wide Data)
      • 16-Bit SDRAM With 128-MB Address Space
    • DDR2/Mobile DDR Memory Controller With one of the Following:
      • 16-Bit DDR2 SDRAM With 256-MB Address Space
      • 16-Bit mDDR SDRAM With 256-MB Address Space
  • One Configurable 16550-Type UART Module:
    • With Modem Control Signals
    • 16-Byte FIFO
    • 16x or 13x Oversampling Option
  • One Serial Peripheral Interface (SPI) With Multiple Chip Selects
  • Two Master and Slave Inter-Integrated Circuits
    (I2C Bus™)
  • One Host-Port Interface (HPI) With 16-Bit-Wide Muxed Address and Data Bus For High Bandwidth
  • One Multichannel Audio Serial Port (McASP):
    • Two Clock Zones and 16 Serial Data Pins
    • Supports TDM, I2S, and Similar Formats
    • DIT-Capable
    • FIFO Buffers for Transmit and Receive
  • One Multichannel Buffered Serial Port (McBSPs):
    • Supports TDM, I2S, and Similar Formats
    • AC97 Audio Codec Interface
    • Telecom Interfaces (ST-Bus, H100)
    • 128-Channel TDM
    • FIFO Buffers for Transmit and Receive
  • Real-Time Clock (RTC) With 32-kHz Oscillator and Separate Power Rail
  • One 64-Bit General-Purpose Timer (Configurable as Two 32-Bit Timers)
  • One 64-Bit General-Purpose or Watchdog Timer (Configurable as Two 32-Bit General-Purpose Timers)
  • Two Enhanced High-Resolution Pulse Width Modulators (eHRPWMs):
    • Dedicated 16-Bit Time-Base Counter With Period and Frequency Control
    • 6 Single-Edge Outputs, 6 Dual-Edge Symmetric Outputs, or 3 Dual-Edge Asymmetric Outputs
    • Dead-Band Generation
    • PWM Chopping by High-Frequency Carrier
    • Trip Zone Input
  • Three 32-Bit Enhanced Capture (eCAP) Modules:
    • Configurable as 3 Capture Inputs or 3 Auxiliary Pulse Width Modulator (APWM) Outputs
    • Single-Shot Capture of up to Four Event Timestamps
  • Packages:
    • 361-Ball Pb-Free Plastic Ball Grid Array (PBGA) [ZCE Suffix], 0.65-mm Ball Pitch
    • 361-Ball Pb-Free PBGA [ZWT Suffix],
      0.80-mm Ball Pitch
  • Commercial or Extended Temperature

All trademarks are the property of their respective owners.

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Description

The TMS320C6742 fixed- and floating-point DSP is a low-power applications processor based on a C674x DSP core. This DSP provides significantly lower power than other members of the TMS320C6000™ platform of DSPs.

The device enables original-equipment manufacturers (OEMs) and original-design manufacturers (ODMs) to quickly bring to market devices with robust operating systems, rich user interfaces, and high processor performance through the maximum flexibility of a fully integrated, mixed processor solution.

The device DSP core uses a 2-level cache-based architecture. The level 1 program cache (L1P) is a
32-KB direct mapped cache, and the level 1 data cache (L1D) is a 32-KB 2-way, set-associative cache. The level 2 program cache (L2P) consists of a 64-KB memory space that is shared between program and data space. L2 memory can be configured as mapped memory, cache, or combinations of the two.

The peripheral set includes: one I2C Bus interface; one multichannel audio serial port (McASP) with 16 serializers and FIFO buffers; one multichannel buffered serial port (McBSP) with FIFO buffers; one serial peripheral interface (SPI) with multiple chip selects; two 64-bit general-purpose timers each configurable (one configurable as a watchdog); a configurable 16-bit host-port interface (HPI); up to 9 banks of general-purpose input/output (GPIO) pins, with each bank containing 16 pins with programmable interrupt and event generation modes, multiplexed with other peripherals; one UART interface (with RTS and CTS); two enhanced high-resolution pulse width modulator (eHRPWM) peripherals; three 32-bit enhanced capture (eCAP) module peripherals which can be configured as 3 capture inputs or 3 APWM outputs; two external memory interfaces: an asynchronous and SDRAM external memory interface (EMIFA) for slower memories or peripherals; and a higher speed DDR2/Mobile DDR controller.

The rich peripheral set provides the ability to control external peripheral devices and communicate with external processors. For details on each peripheral, see the related sections in this document and the associated peripheral reference guides.

The device has a complete set of development tools for the DSP. These tools include C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a Windows debugger interface for visibility into source code execution.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 37
Type Title Date
* Datasheet TMS320C6742 Fixed- and Floating-Point DSP datasheet (Rev. F) Jan. 31, 2017
* Errata TMS320C6742 Fixed- and Floating-Point DSP (Revs 2.3, 2.1, 2.0, 1.1 & 1.0) (Rev. H) Mar. 21, 2014
* User guides TMS320C6742 DSP Technical Reference Manual (Rev. C) Sep. 12, 2016
User guides SYS/BIOS (TI-RTOS Kernel) User's Guide (Rev. V) Jun. 01, 2020
Application notes How to Migrate CCS 3.x Projects to the Latest CCS Feb. 06, 2020
Application notes Programming mDDR/DDR2 EMIF on OMAP-L1x/C674x Dec. 20, 2019
User guides L138/C6748 development kit (LCDK) (Rev. A) Sep. 18, 2019
Application notes OMAPL138/C6748 ROM Bootloader Resources and FAQ Jun. 24, 2019
Application notes Using DSPLIB FFT Implementation for Real Input and Without Data Scaling Jun. 11, 2019
Application notes Programming PLL Controllers on OMAP-L1x8/C674x/AM18xx Apr. 25, 2019
Application notes TMS320C6748/46/42 power consumption summary Mar. 26, 2019
Application notes General Hardware Design/BGA PCB Design/BGA Feb. 22, 2019
Application notes OMAP-L13x / C674x / AM1x schematic review guidelines Feb. 14, 2019
Application notes McASP Design Guide - Tips, Tricks, and Practical Examples Jan. 10, 2019
User guides SYS/BIOS (TI-RTOS Kernel) User's Guide (Rev. U) Feb. 07, 2018
Application notes Processor SDK RTOS Audio Benchmark Starter Kit Apr. 12, 2017
Application notes TI DSP Benchmarking Jan. 13, 2016
Application notes Using the TMS320C6748/C6746/C6742 Bootloader (Rev. F) Jan. 23, 2014
User guides System Analyzer User's Guide (Rev. F) Nov. 18, 2013
Application notes OMAP-L132/L138, TMS320C6742/6/8 Pin Multiplexing Utility (Rev. B) Sep. 27, 2013
Application notes Powering the TMS320C6742, TMS320C6746, and TMS320C6748 With the TPS650061 Dec. 19, 2011
Application notes Introduction to TMS320C6000 DSP Optimization Oct. 06, 2011
User guides TMS320C674x/OMAP-L1x Processor Peripherals Overview Reference Guide (Rev. F) Sep. 14, 2011
Application notes High-Vin, High-Efficiency Power Solution Using DC/DC Converter With DVFS (Rev. C) Aug. 29, 2011
Application notes Medium Integrated Power Solution Using a Dual DC/DC Converter and an LDO (Rev. B) Aug. 29, 2011
Application notes Simple Power Solution Using LDOs (Rev. B) Aug. 29, 2011
White papers Software and Hardware Design Challenges Due to Dynamic Raw NAND Market May 19, 2011
User guides TMS320C674x DSP Megamodule Reference Guide (Rev. A) Aug. 03, 2010
User guides TMS320C674x DSP CPU and Instruction Set User's Guide (Rev. B) Jul. 30, 2010
Application notes High-Efficiency Power Solution Using DC/DC Converters With DVFS (Rev. A) May 05, 2010
Application notes High-Integration, High-Efficiency Power Solution Using DC/DC Converters w/DVFS (Rev. A) May 05, 2010
Application notes TMS320C6748/46/42 & OMAP-L132/L138 USB Downstream Host Compliance Testing Aug. 17, 2009
Application notes TMS320C6748/46/42 & OMAP-L1x8 USB Upstream Device Compliance Testing Aug. 17, 2009
Application notes TMS320C6748/46/42 Complementary Products Jul. 20, 2009
White papers Efficient Fixed- and Floating-Point Code Execution on the TMS320C674x Core Jun. 24, 2009
Application notes TMS320C674x/OMAP-L1x USB Compliance Checklist Mar. 12, 2009
User guides TMS320C674x DSP Cache User's Guide (Rev. A) Feb. 11, 2009

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

DEVELOPMENT KITS Download
document-generic User guide
195
Description

The OMAP-L138 DSP+ARM9™ development kit will enable fast and easy Linux software and hardware development. This scalable platform will ease and accelerate software and hardware development of everyday applications that require real-time signal processing and control functional, including (...)

Features
  • Integrated floating-/fixed-point DSP with up to 456 MHz performance; and ARM9 with up to 456 MHz performance
  • Software, expansion headers, schematics and application demos
  • SDKs, DSP/BIOS RTOS, drivers, stacks and protocol, algorithm libraries, flash and boot utilities and StarterWare
DEVELOPMENT KITS Download
document-generic User guide
195
Description

The TMS320C6748 DSP development kit (LCDK) is a scalable platform that breaks down development barriers for applications that require embedded analytics and real-time signal processing, including biometric analytics, communications and audio. The low-cost LCDK will also speed and ease your hardware (...)

Features
  • Integrated floating-/fixed-point DSP with up to 456 MHz performance
  • Software, expansion headers, schematics and application demos
  • SDKs, DSP/BIOS RTOS, drivers, stacks and protocol, algorithm libraries, flash and boot utilities and StarterWare

Software development

SOFTWARE DEVELOPMENT KITS (SDK) Download
Processor SDK for C6748 Processors TI-RTOS Support
PROCESSOR-SDK-C6748 Processor SDK (Software Development Kit) is a unified software platform for TI embedded processors providing easy setup and fast out-of-the-box access to benchmarks and demos.  All releases of Processor SDK are consistent across TI’s broad portfolio, allowing developers to seamlessly (...)
Features

RTOS Features:

  • Full driver availability
  • Debug and instrumentation utilities
  • Board supportpackage
  • Demonstrations and examples
  • Code Composer Studio™ IDE for RTOS development
  • Documentation

The Processor SDK is free, and does not require any run-time royalties to Texas Instruments.

DEBUG PROBES Download
XDS200 USB Debug Probe
TMDSEMU200-U The Spectrum Digital XDS200 is the first model of the XDS200 family of debug probes (emulators) for TI processors. The XDS200 family features a balance of low cost with good performance between the super low cost XDS110 and the high performance XDS560v2, while supporting a wide variety of standards (...)
295
Features

The XDS200 is the mid-range family of JTAG debug probes (emulators) for TI processors. Designed to deliver good performance and the most common features that place it between the low cost XDS110 and the high performance XDS560v2, the XDS200 is the balanced solution to debug TI microcontrollers (...)

DEBUG PROBES Download
XDS560v2 System Trace USB Debug Probe
TMDSEMU560V2STM-U The XDS560v2 System Trace is the first model of the XDS560v2 family of high-performance debug probes (emulators) for TI processors. The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).

The (...)

995
Features

XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)

DEBUG PROBES Download
XDS560v2 System Trace USB & Ethernet Debug Probe
TMDSEMU560V2STM-UE The XDS560v2 System Trace is the first model of the XDS560v2 family of high-performance debug probes (emulators) for TI processors. The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).

The (...)

1495
Features
  • XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)

DRIVERS & LIBRARIES Download
DSP Math Library for Floating Point Devices
MATHLIB — The Texas Instruments math library is an optimized floating-point math function library for C programmers using TI floating point devices. These routines are typically used in computationally intensive real-time applications where optimal execution speed is critical. By using these routines instead (...)
Features
  • Types of functions included:
    • Trigonometric and hyperbolic: Sin, Cos, Tan, Arctan, etc.
    • Power, exponential, and logarithmic
    • Reciprocal
    • Square root
    • Division
  • Natural C Source Code
  • Optimized C code with Intrinsics
  • Hand-coded assembly-optimized routines
  • C-callable routines, which can be inlined and are fully (...)
DRIVERS & LIBRARIES Download
TMS320C5000/6000 Image Library (IMGLIB)
SPRC264 C5000/6000 Image Processing Library (IMGLIB) is an optimized image/video processing function library for C programmers. It includes C-callable general-purpose image/video processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)
Features

Image Analysis

  • Image boundry and perimeter
  • Morphological operation
  • Edge detection
  • Image Histogram
  • Image thresholding

Image filtering and format conversion

  • Color space conversion
  • Image convolution
  • Image correlation
  • Error diffusion
  • Median filtering
  • Pixel expansion

Image compression and decompression

  • Forward and (...)
DRIVERS & LIBRARIES Download
TMS320C6000 DSP Library (DSPLIB)
SPRC265 TMS320C6000 Digital Signal Processor Library (DSPLIB) is a platform-optimized DSP function library for C programmers. It includes C-callable, general-purpose signal-processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)
Features

Optimized DSP routines including functions for:

  • Adaptive filtering
  • Correlation
  • FFT
  • Filtering and convolution: FIR, biquad, IIR, convolution
  • Math: Dot products, max value, min value, etc.
  • Matrix operations
DRIVERS & LIBRARIES Download
Telecom and Media Libraries - FAXLIB, VoLIB and AEC/AER for TMS320C64x+ and TMS320C55x Processors
TELECOMLIB Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be acquired (...)
Features

VoLIB

  • Telogy Software Line Echo Canceller (ECU)
  • Tone Detection Unit (TDU)
  • Caller ID Detection/Generation (CID)
  • Tone Generation Unit (TGU)
  • Voice Activity Detection Unit (VAU)
  • Noise Matching Functions
  • Packet Loss Concealment (PLC)
  • Voice Enhancement Unit (VEU)  

FAXLIB

  • Fax Interface Unit (FIU)
  • Fax Modem (FM)
  • (...)
IDES, CONFIGURATION, COMPILERS & DEBUGGERS Download
C6000 code generation tools - compiler
C6000-CGT — The TI C6000 C/C++ Compiler and Assembly Language Tools support development of applications for TI C6000 Digital Signal Processor platforms, including the C66x multi-core, C674x and C64x+ single-core Digital Signal Processors.
Features
  • Available in C6000 Code Generation Tools starting with v8.3.0:
    • Supports the C++14 Standard ISO/IEC 14882:2014 (C++03 is no longer supported)
  • Available in C6000 Code Generation Tools starting with release v8.2.0:
    • Conversion of floating-point values to unsigned char or short no longer generate RTS (...)
IDES, CONFIGURATION, COMPILERS & DEBUGGERS Download
Code Composer Studio (CCS) Integrated Development Environment (IDE)
CCSTUDIO

Code Composer Studio is an integrated development environment (IDE) that supports TI's Microcontroller and Embedded Processors portfolio. Code Composer Studio comprises a suite of tools used to develop and debug embedded applications. It includes an optimizing C/C++ compiler, source code editor (...)

SOFTWARE CODECS Download
Adaptive Digital Technologies DSP VOIP, speech and audio codecs
Provided by Adaptive Digital Technologies, Inc. — Adaptive Digital is a developer of voice quality enhancement algorithms, and best-in-class acoustic echo cancellation software that work with TI DSPs. Adaptive Digital has extensive experience in the algorithm development, implementation, optimization and configuration tuning. They provide solutions (...)
SOFTWARE CODECS Download
Vocal technologies DSP VoIP codecs
Provided by VOCAL Technologies, Ltd. — With over 25 years of assembly and C code development, VOCAL modular software suite is available for a wide variety of TI DSPs. Products include ATAs, VoIP servers and gateways, HPNA-based IPBXs, video surveillance, voice and video conferencing, voice and data RF devices, RoIP gateways, secure (...)

Design tools & simulation

SIMULATION MODELS Download
SPRM364B.ZIP (17 KB) - BSDL Model
SIMULATION MODELS Download
SPRM365C.ZIP (121 KB) - IBIS Model
SIMULATION MODELS Download
SPRM367B.ZIP (17 KB) - BSDL Model
SIMULATION MODELS Download
SPRM368B.ZIP (120 KB) - IBIS Model

CAD/CAE symbols

Package Pins Download
NFBGA (ZWT) 361 View options

Ordering & quality

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