4.5-V to 18-V, stackable 35-A synchronous SWIFT™ buck converter with PMBus and pin-strapping
Product details
Parameters
Package | Pins | Size
Features
- PMBus™ 1.3 Compliant Converters: 35 A
- 2-Device Stackable for up to 70 A With Current Sharing
- Input Voltage Range: 4.5 V to 18 V
- Output Voltage Range: 0.35 V to 5.5 V
- Integrated 3.2-mΩ and 1.4-mΩ Stacked NexFET™ Power Stage
- 350-mV to 1650-mV Reference for Adaptive Voltage Scaling (AVS) Function and Margining through PMBus
- 0.5% Reference Accuracy at 600 mV and Above
- Lossless Low-Side MOSFET Current Sensing
- Voltage Mode Control With Input Feed-Forward
- Differential Remote Sensing
- Monotonic Start-Up into Pre-Biased Output
- Output Voltage and Output Current Reporting
- Internal Die Temperature Monitoring
- 2 PMBus Addresses (Master 36d/Slave 37d)
- Selectable Boot-up Vout and Soft Start Values via Pin-Strapping
- Programmable via the PMBus Interface:
- OCP, UVLO, Soft-Start, PG, OV, UV, OT Levels, Fault Responses
- Turnon and Turnoff Delays
- Thermal Shutdown
- Pin Strapping for Switching Frequency: 200 kHz to 1 MHz
- Frequency Synchronization to an External Clock or Output Clock to Sync Out
- Create a Custom Design Using the TPS546C20A With the WEBENCH® Power Designer
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Description
The TPS546C20A devices are PMBus 1.3 Compliant, non-isolated DC/DC converters with integrated FETs, capable of high-frequency operation and 35-A current output from a 7-mm × 5-mm package. Two TPS546C20A devices can be paralleled together to provide up to 70-A load. Current sensing is realized by sampling a small portion of the power stage current and independent on the device temperature. High-frequency, low-loss switching, provided by an integrated NexFET power stage and optimized drivers, allows for very high-density power solutions. The PMBus interface enables the AVS functions through VOUT_COMMAND, flexible converter configuration, as well as key parameters monitoring including output voltage, current, and internal die temperature. Response to fault conditions can be set to either restart, latch-off or ignore depending on system requirements.
Same functionality but is not pin-for-pin or parametrically equivalent to the compared device:
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | TPS546C20A 4.5-V to 18-V, 35-A 2× Stackable Synchronous Buck Converters With PMBus Supporting Telemetry datasheet (Rev. C) | Jun. 11, 2018 |
Application note | Programming the NVM of PMBus Buck Converters to Support Mass-Production Needs (Rev. B) | May 13, 2019 | |
Technical article | Minimize the impact of the MLCC shortage on your power application | Mar. 29, 2019 | |
Technical article | Powering FPGAs - What to consider with Xilinx UltraScale+ FPGAs | Jan. 29, 2018 | |
Application note | Analysis and Design of Input Filter for DC-DC Circuit | Nov. 27, 2017 | |
User guide | TPS546C20AEVM2-746 Two-Phase Interleaving Evaluation Module | Nov. 22, 2016 | |
User guide | TPS546C20AEVM1-746 Two, Separated Single-Phase Evaluation Module | Jun. 21, 2016 | |
Application note | Method of Graphing Safe Operating Area (SOA) Curves in DC-DC Converter | Mar. 30, 2016 | |
Application note | MOSFET power losses and how they affect power-supply efficiency | Jan. 26, 2016 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
Features
- Two seperated PMBUS-Enabled BUCK converters. 35A DC steady state Ouput current from each converter.
- ±0.5% 0.6VREF Tolerance Over -40 to 125°C Junction Temperature
- 0.35V to 1.65V Adjustable VREF for AVS and Marginnig through PMBUS
- True Differential Remote Sense Amplifier
- Programmable OCP, UVLO, OV, UV, OT (...)
Description
Features
- Two phase interleaving PMBUS-Enabled BUCK converters. 70A DC steady state Ouput current.
- ±0.5% 0.6VREF Tolerance Over -40 to 125°C Junction Temperature
- 0.35V to 1.65V Adjustable VREF for AVS and Marginnig through PMBUS
- True Differential Remote Sense Amplifier
- Programmable OCP, UVLO, OV, UV, OT thresholds (...)
Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
Reference designs
Design files
-
download PMP20292 BOM.pdf (141KB) -
download PMP20292 Assembly Drawing.pdf (247KB) -
download PMP20292 PCB.pdf (2685KB) -
download PMP20292 CAD Files.zip (898KB) -
download PMP20292 Gerber.zip (607KB)
Design files
-
download PMP20071 Assembly Drawing (PWR746E1).pdf (362KB) -
download PMP20071 PCB (PWR746E1).pdf (3807KB) -
download PMP20071 CAD Files.zip (393KB) -
download PMP20071 CAD Files (PWR746E1).zip (6532KB) -
download PMP20071 Gerber (PWR746E1).zip (899KB) -
download PMP20071 BOM (Rev. A).pdf (72KB)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
LQFN-CLIP (RVF) | 40 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
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