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Product details

Parameters

Output options Adjustable Output, Programmable Output Iout (Max) (A) 2 Vin (Max) (V) 6.5 Vin (Min) (V) 1.43 Vout (Max) (V) 5 Vout (Min) (V) 0.9 Noise (uVrms) 40 Iq (Typ) (mA) 4 Thermal resistance θJA (°C/W) 36 Load capacitance (Min) (µF) 4.7 Rating Catalog Regulated outputs (#) 1 Features Enable, Power Good, Soft Start Accuracy (%) 1.5 PSRR @ 100 KHz (dB) 25 Dropout voltage (Vdo) (Typ) (mV) 180 Operating temperature range (C) -40 to 125 open-in-new Find other Linear regulators (LDO)

Package | Pins | Size

VQFN (RGT) 16 9 mm² 3 x 3 VQFN (RGW) 20 25 mm² 5 x 5 open-in-new Find other Linear regulators (LDO)

Features

  • Low-Dropout Voltage: 180 mV at 2 A
  • VIN Range: 1.5 V to 6.5 V
  • Configurable Fixed VOUT Range: 0.9 V to 3.5 V
  • Adjustable VOUT Range: 0.9 V to 5 V
  • Very Good Load- and Line-Transient Response
  • Stable With Ceramic Output Capacitor
  • 1.5% Accuracy Overline, Overload, and Overtemperature
  • Programmable Soft Start
  • Power Good (PG) Output
  • 3-mm × 3-mm QFN-16 and 5-mm × 5-mm
    VQFN-20 Packages
open-in-new Find other Linear regulators (LDO)

Description

The TPS7A7200 low-dropout (LDO) voltage regulator is designed for applications seeking very-low dropout capability (180 mV at 2 A) with an input voltage from 1.5 V to 6.5 V. The TPS7A7200 offers an innovative, user-configurable, output-voltage setting from 0.9 V to 3.5 V, eliminating external resistors and any associated error.

The TPS7A7200 has very fast load-transient response, is stable with ceramic output capacitors, and supports a better than 2% accuracy over line, load, and temperature. A soft-start pin allows for an application to reduce inrush into the load. Additionally, an open-drain, Power Good signal allows for sequencing power rails.

The TPS7A7200 is available in 3-mm × 3-mm, 16-pin QFN and 5-mm × 5-mm, 20-pin VQFN packages.

open-in-new Find other Linear regulators (LDO)
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Same functionality but is not pin-for-pin or parametrically equivalent to the compared device:
TPS7A92 ACTIVE 2-A, low-noise, high-PSRR, adjustable ultra-low-dropout voltage regulator with high-accuracy 2-A, low noise (4.7uVrms) LDO in a small package (2.5 mm x 2.5mm)
Similar but not functionally equivalent to the compared device:
TPS7A83A ACTIVE 2-A, low-VIN (1.1-V), low-noise, high-accuracy, ultra-low-dropout voltage regulator with power good 2-A LDO with low-noise (4.4 µVrms) and low-dropout (200mV) and improved accuracy (0.75%)

Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet TPS7A7200 2-A, Fast-Transient, Low-Dropout Voltage Regulator datasheet (Rev. F) Nov. 30, 2015
Technical articles LDO basics: capacitor vs. capacitance Aug. 01, 2018
Technical articles LDO Basics: Preventing reverse current Jul. 25, 2018
Technical articles LDO basics: introduction to quiescent current Jun. 20, 2018
Selection guides Low Dropout Regulators Quick Reference Guide (Rev. P) Mar. 21, 2018
Technical articles LDO basics: noise – part 1 Jun. 14, 2017
Application notes ANY-OUT™ LDO Controlled by I2C™ IO Expander Device (Rev. A) Sep. 20, 2012
Application notes ANY-OUT™ LDO Controlled by I2C™ IO Expander Device May 29, 2012
User guides TPS7A7x00EVM-718 Evaluation Module Feb. 28, 2012

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
Description

The ADC32RF42 evaluation module (EVM) demonstrates the performance of a dual 1.5-GSPS 14-bit analog-to-digital converter (ADC) with the JESD204B interface. The EVM includes the ADC32RF42 device, and JESD204B clocking is provided by the LMK04828 and TI voltage regulators to provide the necessary (...)

Features
  • External clocking supported, or onboard clock generation with LMK04828 generating SYSREF
  • JESD204B data interface to simplify digital interface; compliant up to 12.5-Gbps lane rates
  • Onboard power management with TI
EVALUATION BOARDS Download
document-generic User guide
Description

The ADC32RF44 evaluation module (EVM) demonstrates the performance of a dual 2.5-GSPS 14-bit analog-to-digital converter (ADC) with the JESD204B interface. The EVM includes the ADC32RF44 device, and JESD204B clocking is provided by the LMK04828 and TI voltage regulators to provide the necessary (...)

Features
  • External clocking supported, or onboard clock generation with LMK04828 generating SYSREF
  • JESD204B data interface to simplify digital interface; compliant up to 12.5-Gbps lane rates
  • Onboard power management with TI
EVALUATION BOARDS Download
document-generic User guide
Description

The ADC32RF82 evaluation module (EVM) demonstrates the performance of a dual, 2.45-GSPS, 14-bit analog-to-digital converter (ADC) with the JESD204B interface. The EVM includes the ADC32RF82 device, and JESD204B clocking is provided by the LMK04828 and TI voltage regulators to provide the (...)

Features
  • External clocking supported or onboard clock generation with LMK04828-generating SYSREF
  • JESD204B data interface simplifies digital interface; compliant up to 12.5-GBPS lane rates
  • Onboard power management with Texas Instruments
EVALUATION BOARDS Download
document-generic User guide
20
Description
The Texas Instruments TPS7A7200EVM-718 is a fully assembled and tested Evaluation Module (EVM) for evaluating the TPS7A7200 Low-Dropout Regulator at any of its pin-selectable output voltages (1V to 3.5V in 50mV increments). The EVM circuit is configured to be a reference design for engineering (...)
Features
  • Wide Vin range 1.5V – 6.5V
  • No Resistor Dynamic Vout Configuration
  • 2% Accuracy
  • Low Output Noise (30mVRMS)
  • High PSRR (PSRR 55dB @ 1kHz)
  • Programmable Soft Start
  • Power Good Output

Design tools & simulation

SIMULATION MODELS Download
SBVM149.ZIP (1050 KB) - PSpice Model
SIMULATION MODELS Download
SBVM636.ZIP (1 KB) - PSpice Model
SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)

Reference designs

REFERENCE DESIGNS Download
Direct RF-Sampling Radar Receiver for L-, S-, C-, and X-Band Using ADC12DJ3200 Reference Design
TIDA-01442 The TIDA-01442 reference design utilizes the ADC12DJ3200 evaluation module (EVM) to demonstrate a direct RF-sampling receiver for a radar operating in HF, VHF, UHF, L-, S-, C-, and part of X-band. The wide analog input bandwidth and high sampling rate (6.4 GSPS) of the analog-to-digital (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
Clocking Reference Design for RF Sampling ADCs in Signal Analyzers and Wireless Testers
TIDA-01016 — TIDA-01016 is a clocking solution for high dynamic range high speed ADC. RF input signals are directly captured using the RF sampling approach by high speed ADC. The ADC32RF45 is a dual- channel, 14-bit, 3-GSPS RF sampling ADC. The 3-dB input bandwidth is 3.2 GHz, and it captures signals up to 4 GHz (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
1-GHz Signal Bandwidth RF Sampling Receiver Reference Design
TIDA-01161 — The RF sampling architecture offers an alternative to the traditional super-heterodyne architecture. An RF sampling analog-to-digital converter (ADC) operates at a high sampling rate and converts signals directly from radio frequencies (RF) to digital. Because of the high sampling rate, the RF (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
Multi-band RF Sampling Receiver Reference Design
TIDA-01163 — The RF sampling receiver captures signals directly in the radio frequency (RF) band. In a multi-band application the desired signals are not very wide band but they are spaced far apart within the spectrum. The reference design captures signals in different RF bands and digitally down-converts them (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
RF-Sampling S-Band Radar Receiver Reference Design
TIDA-00814 — A direct RF sampling receiver approach to a radar system operating in S-band is demonstrated using the ADC32RF45, 3-Gsps, 14-bit analog to digital converter (ADC). RF sampling reduces the complexity of a system by removing down conversion and using a high sampling rate enables wider signal (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
VQFN (RGT) 16 View options
VQFN (RGW) 20 View options

Ordering & quality

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