Product details

Output options Adjustable Output Iout (Max) (A) 2 Vin (Max) (V) 6.5 Vin (Min) (V) 1.4 Vout (Max) (V) 5.2 Vout (Min) (V) 0.8 Noise (uVrms) 4.7 Iq (Typ) (mA) 2.1 Thermal resistance θJA (°C/W) 57 Rating Catalog Load capacitance (Min) (µF) 22 Regulated outputs (#) 1 Features Enable, Foldback overcurrent protection, Output discharge, Power good, Soft start Accuracy (%) 1 PSRR @ 100 KHz (dB) 48 Dropout voltage (Vdo) (Typ) (mV) 260 Operating temperature range (C) -40 to 125
Output options Adjustable Output Iout (Max) (A) 2 Vin (Max) (V) 6.5 Vin (Min) (V) 1.4 Vout (Max) (V) 5.2 Vout (Min) (V) 0.8 Noise (uVrms) 4.7 Iq (Typ) (mA) 2.1 Thermal resistance θJA (°C/W) 57 Rating Catalog Load capacitance (Min) (µF) 22 Regulated outputs (#) 1 Features Enable, Foldback overcurrent protection, Output discharge, Power good, Soft start Accuracy (%) 1 PSRR @ 100 KHz (dB) 48 Dropout voltage (Vdo) (Typ) (mV) 260 Operating temperature range (C) -40 to 125
WSON (DSK) 10 6 mm² 2.5 x 2.5
  • 1.0% Accuracy Over Line, Load, and Temperature
  • Low Output Noise: 4.6 µVRMS (10 Hz–100 kHz)
  • Low Dropout: 180 mV (Typ) at 2 A
  • Wide Input Voltage Range: 1.4 V to 6.5 V
  • Wide Output Voltage Range: 0.8 V to 5.2 V
  • High Power-Supply Ripple Rejection (PSRR):
    • 60 dB at DC
    • 40 dB at 100 kHz
    • 40 dB at 1 MHz
  • Fast Transient Response
  • Adjustable Start-Up In-Rush Control With Selectable Soft-Start Charging Current
  • Open-Drain Power-Good (PG) Output
  • RθJC = 3.2°C/W
  • Stable With a 22-µF or Larger Ceramic Output Capacitor
  • 2.5-mm × 2.5-mm, 10-Pin WSON Package
  • 1.0% Accuracy Over Line, Load, and Temperature
  • Low Output Noise: 4.6 µVRMS (10 Hz–100 kHz)
  • Low Dropout: 180 mV (Typ) at 2 A
  • Wide Input Voltage Range: 1.4 V to 6.5 V
  • Wide Output Voltage Range: 0.8 V to 5.2 V
  • High Power-Supply Ripple Rejection (PSRR):
    • 60 dB at DC
    • 40 dB at 100 kHz
    • 40 dB at 1 MHz
  • Fast Transient Response
  • Adjustable Start-Up In-Rush Control With Selectable Soft-Start Charging Current
  • Open-Drain Power-Good (PG) Output
  • RθJC = 3.2°C/W
  • Stable With a 22-µF or Larger Ceramic Output Capacitor
  • 2.5-mm × 2.5-mm, 10-Pin WSON Package

The TPS7A92 is a low-noise (4.8 µVRMS), low-dropout (LDO) voltage regulator capable of sourcing 2 A with only 180 mV of dropout.

The TPS7A92 output is adjustable with external resistors from 0.8 V to 5.2 V. The TPS7A92 wide input-voltage range supports operation as low as 1.4 V and up to 6.5 V.

With 1% output voltage accuracy (over line, load, and temperature) and soft-start capabilities to reduce in-rush current, the TPS7A92 is ideal for powering sensitive analog low-voltage devices [such as voltage-controlled oscillators (VCOs), analog-to-digital converters (ADCs), digital-to-analog converters (DACs), high-end processors, and field-programmable gate arrays (FPGAs)].

The TPS7A92 is designed to power noise-sensitive components such as those found in high-speed communication, video, medical, or test and measurement applications. The very low 4.6-µVRMS output noise and wideband PSRR (40 dB at 1 MHz) minimizes phase noise and clock jitter. These features maximize performance of clocking devices, ADCs, and DACs.

The TPS7A92 is a low-noise (4.8 µVRMS), low-dropout (LDO) voltage regulator capable of sourcing 2 A with only 180 mV of dropout.

The TPS7A92 output is adjustable with external resistors from 0.8 V to 5.2 V. The TPS7A92 wide input-voltage range supports operation as low as 1.4 V and up to 6.5 V.

With 1% output voltage accuracy (over line, load, and temperature) and soft-start capabilities to reduce in-rush current, the TPS7A92 is ideal for powering sensitive analog low-voltage devices [such as voltage-controlled oscillators (VCOs), analog-to-digital converters (ADCs), digital-to-analog converters (DACs), high-end processors, and field-programmable gate arrays (FPGAs)].

The TPS7A92 is designed to power noise-sensitive components such as those found in high-speed communication, video, medical, or test and measurement applications. The very low 4.6-µVRMS output noise and wideband PSRR (40 dB at 1 MHz) minimizes phase noise and clock jitter. These features maximize performance of clocking devices, ADCs, and DACs.

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Technical documentation

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* Data sheet TPS7A92 2-A, High-Accuracy, Low-Noise LDO Voltage Regulator datasheet (Rev. B) 07 Jan 2019

Design & development

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Evaluation board

TPS7A91EVM-831 — TPS7A91 1A Low-Noise Low-Vin Low-Dropout (LDO) Regulator for Analog Evaluation Module

The TPS7A91EVM-831 evaluation module is designed for a typical configuration to evaluate the operation and performance of the TPS7A91, 1A high-accuracy, low dropout voltage regulator. The EVM circuit board is configured to be a reference design for engineering applications requiring current to a (...)
Simulation model

TPS7A9201 PSpice Transient Model

SBVM667.ZIP (92 KB) - PSpice Model
Simulation model

TPS7A9201 Unencrypted PSpice Transient Model

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SON (DSK) 10 View options

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