RS-232 Transceiver With Split Supply Pin for Logic Side
Product details
Parameters
Package | Pins | Size
Features
- VL Pin for Compatibility With Mixed-Voltage Systems
Down to 2.5 V on Logic Side - Enhanced ESD Protection on RIN Inputs and DOUT Outputs
- ±15-kV Human-Body Model
- ±15-kV IEC 61000-4-2, Air-Gap Discharge
- ±8-kV IEC 61000-4-2, Contact Discharge
- Low 300-µA Supply Current
- Specified 250-kbps Data Rate
- 1-µA Low-Power Shutdown
- Meets EIA/TIA-232 Specifications Down to 3 V
- Designed to be Interchangeable With Industry Standard ’3386 Devices
- APPLICATIONS
- Hand-Held Equipment
- PDAs
- Cell Phones
- Battery-Powered Equipment
- Data Cables
Description
The TRS3386E is a three-driver and two-receiver RS-232 interface device, with split supply pins for mixed-signal operations. All RS-232 inputs and outputs are protected to ±15 kV using the IEC 61000-4-2 Air-Gap Discharge method, ±8 kV using the IEC 61000-4-2 Contact Discharge method, and ±15 kV using the Human-Body Model.
The charge pump requires only four small 0.1-µF capacitors for operation from a 3.3-V supply. The TRS3386E is capable of running at data rates up to 250 kbps, while maintaining RS-232-compliant output levels.
The TRS3386E has a unique VL pin that allows operation in mixed-logic voltage systems. Both driver in (DIN) and receiver out (ROUT) logic levels are pin programmable through the VL pin. The TRS3386E is available in a space-saving thin shrink small-outline package (TSSOP).
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | RS-232 Transceiver With Split Supply Pin For Logic Side, TRS3386E datasheet (Rev. C) | Mar. 31, 2011 |
Technical articles | How the RS-232 transceiver’s regulated charge-pump circuitry works | Jun. 28, 2018 | |
Application note | Understanding Power Requirements in RS-232 Applications (Rev. B) | Apr. 26, 2013 | |
Application note | Removing Ground Noise in Data Transmission Systems | Oct. 05, 2007 | |
More literature | RS-232 IEC ESD-Protected Devices From TI (Rev. A) | Jul. 27, 2007 | |
Application note | Interface Circuits for TIA/EIA-232-F (Rev. A) | Sep. 19, 2002 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
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Reference designs
Design files
-
download TIDA-060008 BOM.pdf (56KB) -
download TIDA-060008 CAD files.zip (1688KB) -
download TIDA-060008 Assembly Drawing.pdf (101KB) -
download TIDA-060008 PCB.pdf (458KB) -
download TIDA-060008 Gerber.zip (1858KB)
Design files
-
download TIDA-00540 BOM.pdf (105KB)
Design files
-
download TIDA-00225 BOM.pdf (83KB) -
download TIDA-00225 PCB.zip (455KB) -
download TIDA-00225 CAD Files.zip (236KB) -
download TIDA-00225 Gerber.zip (661KB)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
SOIC (DW) | 20 | View options |
TSSOP (PW) | 20 | View options |
Ordering & quality
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- REACH
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- Ongoing reliability monitoring
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Support & training
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