Product details

Configuration 1:1 SPST Number of channels 2 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 0.75 CON (typ) (pF) 35.5 ON-state leakage current (max) (µA) 0.05 Supply current (typ) (µA) 0.001 Bandwidth (MHz) 150 Operating temperature range (°C) -40 to 85 Features Powered-off protection Input/output continuous current (max) (mA) 200 Rating Catalog Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
Configuration 1:1 SPST Number of channels 2 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 0.75 CON (typ) (pF) 35.5 ON-state leakage current (max) (µA) 0.05 Supply current (typ) (µA) 0.001 Bandwidth (MHz) 150 Operating temperature range (°C) -40 to 85 Features Powered-off protection Input/output continuous current (max) (mA) 200 Rating Catalog Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
DSBGA (YZP) 8 2.8125 mm² 2.25 x 1.25 DSBGA (YZT) 8 1.9404 mm² 1.98 x 0.98 VSSOP (DCU) 8 6.2 mm² 2 x 3.1
  • Isolation in Powered-Down Mode, V+ = 0
  • Low ON-state resistance (0.9 Ω)
  • Control inputs are 5.5-V Tolerant
  • Low charge injection
  • Excellent ON-state resistance matching
  • Low total harmonic distortion (THD)
  • 1.65-V to 5.5-V Single-supply operation
  • Latch-up performance exceeds 100 mA
    per JESD 78, class II
  • ESD Performance tested per JESD 22
    • 2000-V Human-body model
      (A114-B, Class II)
    • 1000-V Charged-device model (C101)
  • Isolation in Powered-Down Mode, V+ = 0
  • Low ON-state resistance (0.9 Ω)
  • Control inputs are 5.5-V Tolerant
  • Low charge injection
  • Excellent ON-state resistance matching
  • Low total harmonic distortion (THD)
  • 1.65-V to 5.5-V Single-supply operation
  • Latch-up performance exceeds 100 mA
    per JESD 78, class II
  • ESD Performance tested per JESD 22
    • 2000-V Human-body model
      (A114-B, Class II)
    • 1000-V Charged-device model (C101)

The TS5A23166 device is a dual single-pole single-throw (SPST) analog switch that is designed to operate from 1.65 V to 5.5 V. The TS5A23166 device offers a low ON-state resistance and an excellent channel-to-channel ON-state resistance matching. The TS5A23166 device has excellent total harmonic distortion (THD) performance and consumes very low power. These features make this device suitable for portable audio applications.

The TS5A23166 device is a dual single-pole single-throw (SPST) analog switch that is designed to operate from 1.65 V to 5.5 V. The TS5A23166 device offers a low ON-state resistance and an excellent channel-to-channel ON-state resistance matching. The TS5A23166 device has excellent total harmonic distortion (THD) performance and consumes very low power. These features make this device suitable for portable audio applications.

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Technical documentation

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Type Title Date
* Data sheet TS5A23166 0.9-Ω Dual-SPST Analog Switch 5-V and 3.3-V 2-Channel Analog Switch datasheet (Rev. J) PDF | HTML 18 Sep 2019
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 Jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 Dec 2021
Application brief Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) PDF | HTML 06 Jan 2021
Application note Preventing Excess Power Consumption on Analog Switches 03 Jul 2008
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Interface adapter

LEADED-ADAPTER1 — Surface mount to DIP header adapter for quick testing of TI's 5, 8, 10, 16 & 24-pin leaded packages

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

User guide: PDF
Not available on TI.com
Interface adapter

LEADLESS-ADAPTER1 — Surface mount to DIP header adapter for testing of TI's 6,8,10,12,14,16, & 20-pin leadless packages

The EVM-LEADLESS1 board allows for quick testing and bread boarding of TI's common leadless packages.  The board has footprints to convert TI's DRC, DTP, DQE, RBW, RGY, RSE, RSV, RSW RTE, RTJ, RUK , RUC, RUG, RUM,RUT and YZP surface mount packages to 100mil DIP headers.
User guide: PDF
Not available on TI.com
Simulation model

HSPICE Model for TS5A23166

SCDJ035.ZIP (97 KB) - HSpice Model
Simulation model

TS5A23166 IBIS Model

SCDM100.ZIP (94 KB) - IBIS Model
Package Pins CAD symbols, footprints & 3D models
DSBGA (YZP) 8 Ultra Librarian
DSBGA (YZT) 8 Ultra Librarian
VSSOP (DCU) 8 Ultra Librarian

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