The UCC21540-Q1 device is an isolated dual channel gate driver with programmable dead time and wide temperature range. This device exhibits consistent performance and robustness under extreme temperature conditions. It is designed with 4 A peak-source and 6 A peak-sink current to drive power MOSFET, IGBT, and GaN transistors.
The UCC21540-Q1 can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver. The input side is isolated from the two output drivers by a 5.7-kVRMS isolation barrier, with a minimum of 125-V/ns common-mode transient immunity (CMTI).
Protection features include: resistor programmable dead time, disable feature to shut down both outputs simultaneously, and negative voltage handling for up to –5-V spikes for 50 ns on input pins. All supplies have UVLO protection.
The UCC21540-Q1 functional safety manual and functional safety FIT Rate, FMD and Pin FMA report are available. Request now
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | UCC21540-Q1 Reinforced Isolation Dual-Channel Gate Driver datasheet (Rev. D) | PDF | HTML | 23 Aug 2024 |
| Certificate | VDE Certificate for Reinforced Isolation for DIN EN IEC 60747-17 (Rev. W) | 04 Mar 2025 | ||
| Application note | Impact of Narrow Pulse Widths in Gate Driver Circuits (Rev. A) | PDF | HTML | 25 Jan 2024 | |
| Certificate | UCC21540 CQC Certificate of Product Certification | 17 Aug 2023 | ||
| Application brief | The Use and Benefits of Ferrite Beads in Gate Drive Circuits | PDF | HTML | 16 Dec 2021 | |
| Certificate | UL Certification E181974 Vol 4. Sec 9 (Rev. A) | 22 Jul 2019 |
For additional terms or required resources, click any title below to view the detail page where available.
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| SOIC (DWK) | 14 | Ultra Librarian |
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