Product details


Number of channels (#) 2 Power switch MOSFET, IGBT Peak output current (A) 4 Input VCC (Min) (V) 4 Input VCC (Max) (V) 15 Features Enable Pin Operating temperature range (C) -40 to 125 Rise time (ns) 20 Fall time (ns) 15 Prop delay (ns) 25 Input threshold CMOS, TTL Channel input logic Inverting Input negative voltage (V) 0 Rating Automotive open-in-new Find other Low-side drivers

Package | Pins | Size

HVSSOP (DGN) 8 9 mm² 3 x 3 SOIC (D) 8 19 mm² 3.91 x 4.9 open-in-new Find other Low-side drivers


  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C6
  • Industry-Standard Pinout
  • Enable Functions for Each Driver
  • High-Current Drive Capability of ±4 A
  • Unique Bipolar and CMOS True Drive Output Stage Provides High Current at MOSFET Miller Thresholds
  • Inputs Independent of Supply Voltage Compatible With TTL and CMOS
  • 20-ns Typical Rise and 15-ns Typical Fall Times With 1.8-nF Load
  • Typical Propagation Delay Times of 25 ns With Input Falling and 35 ns With Input Rising
  • 4-V to 15-V Supply Voltage
  • Dual Outputs Can Be Paralleled for Higher Drive Current
  • Available in Thermally Enhanced MSOP PowerPAD Package
  • Rated From –40°C to +125°C

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The UCC2742x-Q1 family of devices are high-speed dual MOSFET drivers capable of delivering large peak currents into capacitive loads. Two standard logic options are offered: dual inverting and dual noninverting drivers. They are offered in the standard 8-pin SOIC (D) package. The thermally enhanced 8-pin PowerPAD Package MSOP package (DGN) drastically lowers the thermal resistance to improve long-term reliability.

Using a design that inherently minimizes shoot-through current, these drivers deliver 4-A current where it is needed most, at the Miller plateau region, during the MOSFET switching transition. A unique bipolar and MOSFET hybrid output stage in parallel also allows efficient current sourcing and sinking at low supply voltages.

The UCC2742x-Q1 provide enable (ENBL) functions to have better control of the operation of the driver applications. ENBA and ENBB are implemented on pins 1 and 8, which were previously left unused in the industry standard pinout. They are internally pulled up to VDD for active-high logic and can be left open for standard operation.

For all available packages, see the orderable addendum at the end of the data sheet.
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Technical documentation

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Type Title Date
* Datasheet UCC2742x-Q1 Dual 4-A High-Speed Low-Side MOSFET Drivers With Enable datasheet (Rev. H) Oct. 04, 2016
Application note External Gate Resistor Selection Guide (Rev. A) Feb. 28, 2020
Application note Understanding Peak IOH and IOL Currents (Rev. A) Feb. 28, 2020
Application note Improving Efficiency of DC-DC Conversion through Layout May 07, 2019
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) Oct. 29, 2018
Technical articles How to achieve higher system robustness in DC drives, part 3: minimum input pulse Sep. 19, 2018
Technical articles How to achieve higher system robustness in DC drives, part 2: interlock and deadtime May 30, 2018
Technical articles Boosting efficiency for your solar inverter designs May 24, 2018
Technical articles How to achieve higher system robustness in DC drives, part 1: negative voltage Apr. 17, 2018
User guide UCC27423-4-5-Q1 EVM User’s Guide (Rev. A) Apr. 16, 2018

Design & development

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Design tools & simulation

SLUM321.ZIP (44 KB) - PSpice Model
SLUM507.ZIP (2 KB) - PSpice Model
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CAD/CAE symbols

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HVSSOP (DGN) 8 View options
SOIC (D) 8 View options

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