The DP83EC315-Q1 is a 100Mbps,
ultra-low latency Remote Control Edge (RCE) device designed for automotive ECU
applications, including lighting, door, seat and tailgate. The device supports the
control of multiple analog drivers using SPI, I2C, QSPI and UART interfaces. These
interfaces feature programmable baud rates and configurable timing parameters to
meet diverse analog driver requirements. To enhance functional safety, a
hardware-based state machine is integrated to mitigate risks associated with
firmware/flash tampering and the safety qualification of operating systems or
firmware.
DP83EC315-Q1 Transport protocol is
based on IEEE1722-2025 ABB/GBB protocol and aligned with OA TC18 RCP draft v0.5
specifications. DP83EC315-Q1 supports Layer 2 frame header decode and offers ingress
filters for DMAC, VLAN and stream-id.
DP83EC315-Q1 can interface with micro
LED (uLED) controllers and TIs DLP controllers at frame rates as high as 120fps
along with controlling complete HD Headlamp functions (low beam, high beam, DRL,
Tail Indicator, leveling). The RCE supports streaming serial peripherals including
High Speed UART (HS-UART) and QSPI to suit different pixel uLEDs from 4K up to 100K
pixels.
The DP83EC315-Q1 has inbuilt safe
state manager to monitor communication health and perform preconfigured safe state
operation in event of communication failure. DP83ED315-Q1 also can download
initialization configuration for fast start-up time.
The DP83EC315 has integrated
100Base-T1 PHY and fully interoperable with PHYs and Switches compliant to
100Base-T1 standards. DP83EC315 is also compliant to Open Alliance EMC specification
of the 100Base-T1 PHY.
The DP83EC315-Q1 is a 100Mbps,
ultra-low latency Remote Control Edge (RCE) device designed for automotive ECU
applications, including lighting, door, seat and tailgate. The device supports the
control of multiple analog drivers using SPI, I2C, QSPI and UART interfaces. These
interfaces feature programmable baud rates and configurable timing parameters to
meet diverse analog driver requirements. To enhance functional safety, a
hardware-based state machine is integrated to mitigate risks associated with
firmware/flash tampering and the safety qualification of operating systems or
firmware.
DP83EC315-Q1 Transport protocol is
based on IEEE1722-2025 ABB/GBB protocol and aligned with OA TC18 RCP draft v0.5
specifications. DP83EC315-Q1 supports Layer 2 frame header decode and offers ingress
filters for DMAC, VLAN and stream-id.
DP83EC315-Q1 can interface with micro
LED (uLED) controllers and TIs DLP controllers at frame rates as high as 120fps
along with controlling complete HD Headlamp functions (low beam, high beam, DRL,
Tail Indicator, leveling). The RCE supports streaming serial peripherals including
High Speed UART (HS-UART) and QSPI to suit different pixel uLEDs from 4K up to 100K
pixels.
The DP83EC315-Q1 has inbuilt safe
state manager to monitor communication health and perform preconfigured safe state
operation in event of communication failure. DP83ED315-Q1 also can download
initialization configuration for fast start-up time.
The DP83EC315 has integrated
100Base-T1 PHY and fully interoperable with PHYs and Switches compliant to
100Base-T1 standards. DP83EC315 is also compliant to Open Alliance EMC specification
of the 100Base-T1 PHY.