Gehäuseinformationen
| Gehäuse | Pins TQFP (PDT) | 128 |
| Betriebstemperaturbereich (°C) 0 to 70 |
| Gehäusemenge | Träger 90 | JEDEC TRAY (10+1) |
Merkmale von DS90C3201
- Up to 9.45Gbit/s data throughput
- 8 MHz to 135 MHz input clock support
- Supports up to QXGA panel resolutions
- Supports HDTV resolutions and frame rates up to 1920 x 1080p
- LVDS 30-bit, 24-bit or 18-bit color data outputs
- Supports single pixel and dual pixel interfaces
- Supports spread spectrum clocking
- Two-wire serial communication interface
- Programmable clock edge and control strobe select
- Power down mode
- +3.3V supply voltage
- 128-pin TQFP
- Compliant to TIA/EIA-644-A-2001 LVDS Standard
All trademarks are the property of their respective owners.
Beschreibung von DS90C3201
The DS90C3201 is a 3.3V single/dual FPD-Link 10-bit color transmitter is designed to be used in Liquid Crystal Display TVs, LCD Monitors, Digital TVs, and Plasma Display Panel TVs. The DS90C3201 is designed to interface between the digital video processor and the display device using the low-power, low-EMI LVDS (Low Voltage Differential Signaling) interface. The DS90C3201 converts up to 70 bits of LVCMOS/LVTTL data into ten LVDS data streams. The transmitter can be programmed clocking data with rising edge or falling edge clock. Optional two-wire serial programming allows fine tuning in development and production environments. At a transmitted clock frequency of 135 MHz, 70 bits of LVCMOS/LVTTL data are transmitted at an effective rate of 945 Mbps per LVDS channel. Using a 135 MHz clock, the data throughput is 9.45Gbit/s (945Mbytes/s). This allows the dual 10-bit LVDS Transmitter to support HDTV resolutions.