Gehäuseinformationen
| Gehäuse | Pins SOIC (DW) | 24 |
| Betriebstemperaturbereich (°C) -40 to 85 |
| Gehäusemenge | Träger 2.000 | LARGE T&R |
Merkmale von PCA9539
- Low standby-current consumption of 1 µA max
- I2C to Parallel port expander
- Open-drain active-low interrupt output
- Active-low reset input
- 5-V Tolerant I/O ports
- Compatible with most microcontrollers
- 400-kHz Fast I2C Bus
- Polarity inversion register
- Address by two hardware address pins for use of up to four devices
- Latched outputs with high-current drive capability for directly driving LEDs
- Latch-up performance exceeds 100 mA Per JESD 78, class II
- ESD protection exceeds JESD 22
- 2000-V Human-body model (A114-A)
- 1000-V Charged-device model (C101)
Beschreibung von PCA9539
The system master can reset the PCA9539 in the event of a time-out or other improper operation by asserting a low in the RESET input. The power-on reset puts the registers in their default state and initializes the I2C/SMBus state machine. Asserting RESET causes the same reset/initialization to occur without de-powering the part.
The PCA9539 open-drain interrupt ( INT) output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system master that an input state has changed.
INT can be connected to the interrupt input of a microcontroller. By sending an interrupt signal on this line, the remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via the I2C bus. Thus, the PCA9539 can remain a simple slave device.
The device outputs (latched) have high-current drive capability for directly driving LEDs. The device has low current consumption.
The PCA9539 is identical to the PCA9555, except for the removal of the internal I/O pullup resistor, which greatly reduces power consumption when the I/Os are held low, replacement of A2 with RESET, and a different address range.
Two hardware pins (A0 and A1) are used to program and vary the fixed I2C address and allow up to four devices to share the same I2C bus or SMBus.